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![Masahiro Yamada](/assets/img/avatar_default.png)
The MIO clock is enabled by default, and the STDMAC clock is enabled by the clk driver. The ad-hoc way to enable the clock is no longer needed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
33 lines
662 B
C
33 lines
662 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2011-2015 Panasonic Corporation
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* Copyright (C) 2015-2016 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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*/
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#include <linux/io.h>
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#include "../init.h"
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#include "../sc-regs.h"
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void uniphier_ld4_clk_init(void)
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{
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u32 tmp;
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/* deassert reset */
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tmp = readl(SC_RSTCTRL);
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#ifdef CONFIG_NAND_DENALI
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tmp |= SC_RSTCTRL_NRST_NAND;
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#endif
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writel(tmp, SC_RSTCTRL);
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readl(SC_RSTCTRL); /* dummy read */
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/* provide clocks */
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tmp = readl(SC_CLKCTRL);
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#ifdef CONFIG_NAND_DENALI
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tmp |= SC_CLKCTRL_CEN_NAND;
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#endif
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writel(tmp, SC_CLKCTRL);
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readl(SC_CLKCTRL); /* dummy read */
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}
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