ARM: uniphier: remove ad-hoc clock enabling for EHCI

The MIO clock is enabled by default, and the STDMAC clock is
enabled by the clk driver.  The ad-hoc way to enable the clock
is no longer needed.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Masahiro Yamada 2018-09-10 12:58:36 +09:00
parent c3ab1e118f
commit e39eed8f47
4 changed files with 0 additions and 15 deletions

View File

@ -34,14 +34,8 @@ void uniphier_ld11_clk_init(void)
#ifdef CONFIG_USB_EHCI_HCD
{
/* FIXME: the current clk driver can not handle parents */
u32 tmp;
int ch;
tmp = readl(SC_CLKCTRL4);
tmp |= BIT(10) | BIT(8); /* MIO, STDMAC */
writel(tmp, SC_CLKCTRL4);
for (ch = 0; ch < 3; ch++) {
void __iomem *phyctrl = (void __iomem *)SG_USBPHYCTRL;

View File

@ -24,9 +24,6 @@ void uniphier_ld4_clk_init(void)
/* provide clocks */
tmp = readl(SC_CLKCTRL);
#ifdef CONFIG_USB_EHCI_HCD
tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
#endif
#ifdef CONFIG_NAND_DENALI
tmp |= SC_CLKCTRL_CEN_NAND;
#endif

View File

@ -39,9 +39,6 @@ void uniphier_pro4_clk_init(void)
tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
SC_CLKCTRL_CEN_GIO;
#endif
#ifdef CONFIG_USB_EHCI_HCD
tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
#endif
#ifdef CONFIG_NAND_DENALI
tmp |= SC_CLKCTRL_CEN_NAND;
#endif

View File

@ -42,7 +42,6 @@
#define SC_RSTCTRL_NRST_USB3B0 (0x1 << 17) /* USB3 #0 bus */
#define SC_RSTCTRL_NRST_USB3C0 (0x1 << 16) /* USB3 #0 core */
#define SC_RSTCTRL_NRST_ETHER (0x1 << 12)
#define SC_RSTCTRL_NRST_STDMAC (0x1 << 10)
#define SC_RSTCTRL_NRST_GIO (0x1 << 6)
/* Pro4 or older */
#define SC_RSTCTRL_NRST_UMC1 (0x1 << 5)
@ -73,8 +72,6 @@
#define SC_CLKCTRL_CEN_USB31 (0x1 << 17) /* USB3 #1 */
#define SC_CLKCTRL_CEN_USB30 (0x1 << 16) /* USB3 #0 */
#define SC_CLKCTRL_CEN_ETHER (0x1 << 12)
#define SC_CLKCTRL_CEN_MIO (0x1 << 11)
#define SC_CLKCTRL_CEN_STDMAC (0x1 << 10)
#define SC_CLKCTRL_CEN_GIO (0x1 << 6)
/* Pro4 or older */
#define SC_CLKCTRL_CEN_UMC (0x1 << 4)