Lokesh Vutla a9a84480f4 arm: k3: Add support for updating msmc dt node ... Certain parts of msmc sram can be used by DMSC or can be marked as L3 cache. Since the available size can vary, changing DT every time the size varies might be painful. So, query this information using TISCI cmd and fixup the DT for kernel. Fixing up DT does the following: - Create a sram node if not available - update the reg property with available size - update ranges property - loop through available sub nodes and delete it if: - mentioned size is out if available range - subnode represents l3 cache or dmsc usage. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>		2019-04-12 08:05:51 -04:00
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include/mach	arm: k3: Add support for updating msmc dt node	2019-04-12 08:05:51 -04:00
am6_init.c	spl: Kconfig: Replace CONFIG_SPL_EXT_SUPPORT to CONFIG_SPL_FS_EXT4	2019-02-01 09:14:21 -05:00
arm64-mmu.c	arm64: zynqmp: Move SoC sources to mach-zynqmp	2019-01-24 10:03:44 +01:00
common.c	arm: k3: Add support for updating msmc dt node	2019-04-12 08:05:51 -04:00
common.h	armv7R: K3: am654: Enable MPU regions	2018-11-16 16:51:58 -05:00
config.mk	arm: K3: Fix usage of CONFIG_SYS_K3_KEY	2018-12-26 21:35:52 -05:00
Kconfig	armv7R: K3: am654: Add support to start ATF from R5 SPL	2018-11-16 16:51:58 -05:00
lowlevel_init.S	armv7r: K3: Allow SPL to run only on core 0	2018-11-26 22:52:11 -05:00
Makefile	armv7r: K3: Allow SPL to run only on core 0	2018-11-26 22:52:11 -05:00
r5_mpu.c	armv7R: K3: am654: Enable MPU regions	2018-11-16 16:51:58 -05:00