Stefan Roese d7b935bf62 x86: baytrail: Add SIO HS-UART clock setup ... To support the BayTrail internal SIO HS UART, the internal UART clock needs to get configured. This patch adds support for this clock configuration which will be done, if the PCI device(s) are found. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>		2016-08-16 11:44:09 +08:00
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cpu	x86: baytrail: Add SIO HS-UART clock setup	2016-08-16 11:44:09 +08:00
dts	x86: Add Advantech SOM-DB5800/SOM-6867 support	2016-07-12 13:46:01 +08:00
include/asm	x86: cache.h: Add default for CONFIG_SYS_CACHELINE_SIZE	2016-08-16 11:44:09 +08:00
lib	dm: Use dm_scan_fdt_dev() directly where possible	2016-07-27 14:15:54 -06:00
config.mk	efi: Add 64-bit payload support	2015-08-05 08:44:07 -06:00
Kconfig	x86: Add Advantech SOM-DB5800/SOM-6867 support	2016-07-12 13:46:01 +08:00
Makefile	x86: Add support for U-Boot as an EFI application	2015-08-05 08:44:06 -06:00