u-boot-brain/arch/arm/cpu/armv8/fsl-layerscape
Laurentiu Tudor 2a5bbb13cc pci: layerscape: add a way of specifying additional iommu mappings
In the current implementation, u-boot creates iommu mappings only
for PCI devices enumarated at boot time thus does not take into
account more dynamic scenarios such as SR-IOV or PCI hot-plug.
Add an u-boot env var and a device tree property (to be used for
example in more static scenarios such as hardwired PCI endpoints
that get initialized later in the system setup) that would allow
two things:
 - for a SRIOV capable PCI EP identified by its B.D.F specify
   the maximum number of VFs that will ever be created for it
 - for hot-plug case, specify the B.D.F with which the device
   will show up on the PCI bus
More details can be found in the included documentation:
  arch/arm/cpu/armv8/fsl-layerscape/doc/README.pci_iommu_extra

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-10-23 16:52:09 +05:30
..
doc pci: layerscape: add a way of specifying additional iommu mappings 2020-10-23 16:52:09 +05:30
cpu.c armv8: lx2160a: fix reset sequence 2020-09-24 20:57:32 +05:30
cpu.h
fdt.c armv8: layerscape: clean exported symbols in spintable.S 2020-07-27 14:16:28 +05:30
fsl_lsch2_serdes.c common: Drop linux/delay.h from common header 2020-05-18 21:19:23 -04:00
fsl_lsch2_speed.c common: Move clock functions into a new file 2020-01-17 13:27:29 -05:00
fsl_lsch3_serdes.c common: Drop linux/bitops.h from common header 2020-05-18 21:19:23 -04:00
fsl_lsch3_speed.c common: Move clock functions into a new file 2020-01-17 13:27:29 -05:00
icid.c armv8: fsl-layerscape: make icid setup endianness aware 2019-08-22 09:07:36 +05:30
Kconfig arm64: ls1043a: Remove the workaround of erratum A-009929 2020-07-27 14:16:28 +05:30
lowlevel.S armv8: layerscape: move spin table into own module 2020-07-27 14:16:27 +05:30
ls1012a_serdes.c
ls1028_ids.c common: Drop log.h from common header 2020-05-18 21:19:18 -04:00
ls1028a_serdes.c armv8: ls1028a_serdes: Add few missing serdes protocols 2020-01-24 14:28:26 +05:30
ls1043_ids.c armv8: fsl-layerscape: fix SEC QI ICID setup 2019-03-03 22:01:09 +05:30
ls1043a_psci.S
ls1043a_serdes.c
ls1046_ids.c armv8: fsl-layerscape: fix SEC QI ICID setup 2019-03-03 22:01:09 +05:30
ls1046a_serdes.c armv8: ls1046afrwy: Add support for LS1046AFRWY platform 2019-06-19 12:54:57 +05:30
ls1088_ids.c armv8: fsl-layerscape: guard caam specific defines 2019-11-08 11:13:38 +05:30
ls1088a_serdes.c armv8: fsl-layerscape: LS1044A/1048A: enable Only 1x 10GE port 2020-01-24 14:28:26 +05:30
ls2080a_serdes.c
ls2088_ids.c armv8: ls2088a: add icid setup for platform devices 2019-11-08 11:13:38 +05:30
lx2160_ids.c armv8: lx2160a: add icid setup for platform devices 2019-11-08 11:13:38 +05:30
lx2160a_serdes.c armv8: lx2160a: Add LX2160A SoC Support 2018-12-06 14:37:19 -08:00
Makefile armv8: layerscape: move spin table into own module 2020-07-27 14:16:27 +05:30
mp.c armv8: layerscape: relocate spin table if EFI_LOADER is enabled 2020-07-27 14:16:28 +05:30
ppa.c common: Drop log.h from common header 2020-05-18 21:19:18 -04:00
soc.c arm: fsl-layerscape: Include device_compat.h in soc.c 2020-10-16 09:44:27 -04:00
spintable.S armv8: layerscape: rework spin table 2020-07-27 14:16:28 +05:30
spl.c common: Drop log.h from common header 2020-05-18 21:19:18 -04:00