u-boot-brain/arch/x86/include/asm/post.h
Simon Glass d1cd045982 x86: Emit post codes in startup code for Chromebooks
On x86 it is common to use 'post codes' which are 8-bit hex values emitted
from the code and visible to the user. Traditionally two 7-segment displays
were made available on the motherboard to show the last post code that was
emitted. This allows diagnosis of a boot problem since it is possible to
see where the code got to before it died.

On modern hardware these codes are not normally visible. On Chromebooks
they are displayed by the Embedded Controller (EC), so it is useful to emit
them. We must enable this feature for the EC to see the codes, so add an
option for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2014-11-21 07:34:11 +01:00

33 lines
583 B
C

/*
* Copyright (c) 2014 Google, Inc
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _post_h
#define _post_h
/* port to use for post codes */
#define POST_PORT 0x80
/* post codes which represent various stages of init */
#define POST_START 0x1e
#define POST_CAR_START 0x1f
#define POST_START_STACK 0x29
#define POST_START_DONE 0x2a
/* Output a post code using al - value must be 0 to 0xff */
#ifdef __ASSEMBLY__
#define post_code(value) \
movb $value, %al; \
outb %al, $POST_PORT
#else
static inline void post_code(int code)
{
outb(code, POST_PORT);
}
#endif
#endif