Hans de Goede cbc1a91afb sunxi: Set AHB1 clock to PLL6/3 on all clock_sun6i.h using SoCs ... According to the datasheets the max speed of AHB1 is 276 MHz, so setting it to PLL6 / 3 which gives us 200MHz everywhere is fine, and gives us a nice speed-up in certain workloads. Suggested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Tested-by: Chen-Yu Tsai <wens@csie.org>		2015-12-10 11:14:16 +01:00
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asm	sunxi: Set AHB1 clock to PLL6/3 on all clock_sun6i.h using SoCs	2015-12-10 11:14:16 +01:00
debug	arm: debug: replace license blocks with SPDX	2014-10-26 22:22:09 +01:00