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https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
c9bb942e2f
Some archs/boards specify their own default by pre-defining the config which causes the Kconfig system to mix up the order of the configs in the defconfigs... This will cause merge pain if allowed to proliferate. Remove the configs that behave this way from the archs. A few configs still remain, but that is because they only exist as defaults and do not have a proper Kconfig entry. Those appear to be: SPIFLASH DISPLAY_BOARDINFO Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> [trini: rastaban, am43xx_evm_usbhost_boot, am43xx_evm_ethboot updates, drop DM_USB from MSI_Primo81 as USB_MUSB_SUNXI isn't converted yet to DM] Signed-off-by: Tom Rini <trini@konsulko.com>
62 lines
1.5 KiB
C
62 lines
1.5 KiB
C
/*
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* Copyright (C) 2014 Samsung Electronics
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*
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* Configuration settings for the SAMSUNG/GOOGLE PEACH-PI board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_PEACH_PI_H
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#define __CONFIG_PEACH_PI_H
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#define CONFIG_ENV_SPI_BASE 0x12D30000
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#define FLASH_SIZE (0x4 << 20)
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#define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE)
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#define CONFIG_SPI_BOOTING
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#define MEM_LAYOUT_ENV_SETTINGS \
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"bootm_size=0x10000000\0" \
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"kernel_addr_r=0x22000000\0" \
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"fdt_addr_r=0x23000000\0" \
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"ramdisk_addr_r=0x23300000\0" \
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"scriptaddr=0x30000000\0" \
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"pxefile_addr_r=0x31000000\0"
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#include <configs/exynos5420-common.h>
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#include <configs/exynos5-dt-common.h>
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#define CONFIG_BOARD_COMMON
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#define CONFIG_SYS_SDRAM_BASE 0x20000000
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#define CONFIG_SYS_TEXT_BASE 0x23E00000
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
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/* select serial console configuration */
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#define CONFIG_SERIAL3 /* use SERIAL 3 */
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#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
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#define CONFIG_SYS_PROMPT "Peach-Pi # "
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#define CONFIG_IDENT_STRING " for Peach-Pi"
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#define CONFIG_VIDEO_PARADE
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/* Display */
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#define CONFIG_LCD
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#ifdef CONFIG_LCD
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#define CONFIG_EXYNOS_FB
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#define CONFIG_EXYNOS_DP
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#define LCD_BPP LCD_COLOR16
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#endif
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#define CONFIG_POWER_TPS65090_EC
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#define CONFIG_USB_XHCI
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#define CONFIG_USB_XHCI_EXYNOS
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/* DRAM Memory Banks */
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#define CONFIG_NR_DRAM_BANKS 7
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#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
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#endif /* __CONFIG_PEACH_PI_H */
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