York Sun c63e137014 powerpc/mpc8xxx: Add memory reset control ... JEDEC spec requires the clocks to be stable before deasserting reset signal for RDIMMs. Clocks start when any chip select is enabled and clock control register is set. This patch also adds the interface to toggle memory reset signal if needed by the boards. Signed-off-by: York Sun <yorksun@freescale.com>		2013-08-09 12:41:39 -07:00
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ddr	powerpc/mpc8xxx: Add memory reset control	2013-08-09 12:41:39 -07:00
cpu.c	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
fdt.c	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
fsl_ifc.c	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
fsl_lbc.c	arch/powerpc/cpu/mpc8xxx/: sparse fixes	2012-11-04 11:00:36 -07:00
law.c	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
Makefile	spl/powerpc: introduce CONFIG_SPL_INIT_MINIMAL	2012-11-26 15:41:24 -06:00
srio.c	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00