u-boot-brain/arch/powerpc/cpu
York Sun c63e137014 powerpc/mpc8xxx: Add memory reset control
JEDEC spec requires the clocks to be stable before deasserting reset
signal for RDIMMs. Clocks start when any chip select is enabled and
clock control register is set. This patch also adds the interface to
toggle memory reset signal if needed by the boards.

Signed-off-by: York Sun <yorksun@freescale.com>
2013-08-09 12:41:39 -07:00
..
74xx_7xx Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
mpc5xx Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
mpc5xxx Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
mpc8xx Merge branch 'master' of git://git.denx.de/u-boot-i2c 2013-07-24 09:50:24 -04:00
mpc8xxx powerpc/mpc8xxx: Add memory reset control 2013-08-09 12:41:39 -07:00
mpc83xx Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
mpc85xx powerpc/mpc8xxx: Add memory reset control 2013-08-09 12:41:39 -07:00
mpc86xx powerpc/mpc8xxx: Add memory reset control 2013-08-09 12:41:39 -07:00
mpc512x Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
mpc824x Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
mpc8260 Merge branch 'master' of git://git.denx.de/u-boot-i2c 2013-07-24 09:50:24 -04:00
ppc4xx Merge branch 'master' of git://git.denx.de/u-boot-i2c 2013-07-24 09:50:24 -04:00