u-boot-brain/arch/riscv
Lukas Auer c3b1a99040 riscv: align bootm implementation with that of other architectures
The bootm implementation of RISC-V diverges from that of other
architectures. Update it to match the implementation of other
architectures. The ARM implementation is used as a reference.

This adds the following features and changes to RISC-V.
* Add support for the BOOTM_STATE_OS_FAKE_GO command
* Call the remove function on devices with the removal flag set before
booting Linux
* Force disconnect USB devices from the host before booting Linux
* Print and add bootstage information to the device tree before booting
Linux

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-11-26 13:57:32 +08:00
..
cpu riscv: save hart ID and device tree passed by prior boot stage 2018-11-26 13:57:32 +08:00
dts riscv: ae350: Clean up mixed tabs and spaces in the dts 2018-10-03 17:48:19 +08:00
include/asm riscv: do not reimplement generic io functions 2018-11-26 13:57:30 +08:00
lib riscv: align bootm implementation with that of other architectures 2018-11-26 13:57:32 +08:00
config.mk riscv: enable -fdata-sections 2018-11-26 13:57:29 +08:00
Kconfig riscv: add Kconfig entries for the C and A ISA extensions 2018-11-26 13:57:29 +08:00
Makefile riscv: set -march and -mabi based on the Kconfig configuration 2018-11-26 13:57:29 +08:00