Sekhar Nori e497fabb91 clk: initialize clk->data when using default xlate ... Right now when using clk_of_xlate_default(), clk->data remains un-initialized because clk_get_bulk() does not initialize memory on allocation of clock structure. This can cause problems when data is used to match if two clocks pointers are exactly the same underlying clocks, for example. Fix it by initializing clk->data to 0. Suggested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>		2019-07-24 12:54:08 -07:00
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altera	clk: socfpga: replace dm_fdt_pre_reloc by dm_ofnode_pre_reloc	2019-04-11 20:10:05 -06:00
analogbits	clk: sifive: Sync-up WRPLL library with upstream Linux	2019-07-19 14:24:51 +08:00
aspeed	aspeed: ast2500: fix D2-PLL clock setting in RGMII mode	2018-11-05 10:41:58 -06:00
at91	clk: at91: replace dm_fdt_pre_reloc by dm_ofnode_pre_reloc	2019-04-11 20:10:05 -06:00
exynos	clk: Remove DM_FLAG_PRE_RELOC flag in various drivers	2018-11-14 09:16:28 -08:00
imx	clk: imx8qm: fix usdhc2 clocks	2019-06-11 10:42:48 +02:00
mediatek	clk: mediatek: add driver for MT8516	2019-04-23 17:57:26 -04:00
meson	clk: meson-g12a: Add PCIE PLL support	2019-05-31 09:57:49 +02:00
mvebu	clk: armada-37xx-periph: Support changing clock parent and rate	2018-09-19 08:59:26 +02:00
owl	clk: Remove DM_FLAG_PRE_RELOC flag in various drivers	2018-11-14 09:16:28 -08:00
renesas	clk: renesas: Synchronize Gen3 tables with Linux 5.0	2019-04-09 18:19:10 +02:00
rockchip	clk: rockchip: rk3399: Set 400MHz ddr clock	2019-07-21 00:00:25 +08:00
sifive	clk: sifive: Drop GEMGXL clock driver	2019-07-19 14:24:51 +08:00
sunxi	sunxi: clocks: Add H6 USB clock gates and resets	2019-07-16 17:13:15 +05:30
tegra	drivers: cosmetic: Convert SPDX license tags to Linux Kernel style	2018-10-28 09:26:39 -04:00
uniphier	clk: uniphier: add EMMC clock for LD11, LD20, and PXs3	2019-07-10 22:41:55 +09:00
clk_bcm6345.c	clk: bcm6345: convert to use live dt	2018-06-01 15:56:02 +02:00
clk_boston.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
clk_fixed_factor.c	clk: Add fixed-factor clock driver	2019-02-27 09:12:33 +08:00
clk_fixed_rate.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
clk_pic32.c	clk: Remove DM_FLAG_PRE_RELOC flag in various drivers	2018-11-14 09:16:28 -08:00
clk_sandbox_test.c	clk: add clk_valid()	2018-08-03 19:53:10 -04:00
clk_sandbox.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
clk_stm32f.c	clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock	2018-05-08 09:07:34 -04:00
clk_stm32h7.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
clk_stm32mp1.c	clk: stm32mp1: Add RTC clock entry	2019-07-22 11:04:52 +02:00
clk_vexpress_osc.c	misc: Update read() and write() methods to return bytes xfered	2018-11-20 19:14:22 -07:00
clk_zynq.c	ARM: zynq: Add missing i2c get_rate for fixing i2c SPL	2019-04-16 11:51:34 +02:00
clk_zynqmp.c	clk: zynqmp: Fixed the same if/else part error reported by coverity	2018-07-19 10:49:53 +02:00
clk-hsdk-cgu.c	Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR	2018-04-27 14:54:48 -04:00
clk-ti-sci.c	clk: Introduce TI System Control Interface (TI SCI) clock driver	2018-09-11 08:32:55 -04:00
clk-uclass.c	clk: initialize clk->data when using default xlate	2019-07-24 12:54:08 -07:00
ics8n3qv01.c	clk: Add ICS8N3QV01 driver	2018-05-08 18:50:23 -04:00
Kconfig	clk: sifive: Factor-out PLL library as separate module	2019-07-19 14:24:51 +08:00
Makefile	clk: sifive: Factor-out PLL library as separate module	2019-07-19 14:24:51 +08:00
mpc83xx_clk.c	mpc83xx_clk: Add enable method	2019-05-21 07:52:34 +02:00
mpc83xx_clk.h	clk: Add MPC83xx clock driver	2018-09-18 00:01:18 -06:00