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clk: imx8qm: fix usdhc2 clocks

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Trying to bring up uSDHC2 the following error message was observed:

MMC:   imx8_clk_set_rate(Invalid clk ID #60)
imx8_clk_set_rate(Invalid clk ID #60)
usdhc@5b030000 - probe failed: -22

This commit fixes this by properly setting resp. clocks.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Max Krummenacher <max.krummenacher@toradex.com>
This commit is contained in:
Marcel Ziswiler 2019-05-31 19:00:17 +03:00 committed by Stefano Babic
parent 38d8955a98
commit 16f8b84917
1 changed files with 18 additions and 0 deletions
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18
drivers/clk/imx/clk-imx8qm.c
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@ -80,6 +80,12 @@ ulong imx8_clk_get_rate(struct clk *clk)
resource = SC_R_SDHC_1;
pm_clk = SC_PM_CLK_PER;
break;
case IMX8QM_SDHC2_IPG_CLK:
case IMX8QM_SDHC2_CLK:
case IMX8QM_SDHC2_DIV:
resource = SC_R_SDHC_2;
pm_clk = SC_PM_CLK_PER;
break;
case IMX8QM_UART0_IPG_CLK:
case IMX8QM_UART0_CLK:
resource = SC_R_UART_0;
@ -185,6 +191,12 @@ ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate)
resource = SC_R_SDHC_1;
pm_clk = SC_PM_CLK_PER;
break;
case IMX8QM_SDHC2_IPG_CLK:
case IMX8QM_SDHC2_CLK:
case IMX8QM_SDHC2_DIV:
resource = SC_R_SDHC_2;
pm_clk = SC_PM_CLK_PER;
break;
case IMX8QM_ENET0_IPG_CLK:
case IMX8QM_ENET0_AHB_CLK:
case IMX8QM_ENET0_REF_DIV:
@ -273,6 +285,12 @@ int __imx8_clk_enable(struct clk *clk, bool enable)
resource = SC_R_SDHC_1;
pm_clk = SC_PM_CLK_PER;
break;
case IMX8QM_SDHC2_IPG_CLK:
case IMX8QM_SDHC2_CLK:
case IMX8QM_SDHC2_DIV:
resource = SC_R_SDHC_2;
pm_clk = SC_PM_CLK_PER;
break;
case IMX8QM_ENET0_IPG_CLK:
case IMX8QM_ENET0_AHB_CLK:
case IMX8QM_ENET0_REF_DIV: