u-boot-brain/arch/arm/mach-rockchip/Kconfig
huang lin be1d5e0388 rockchip: rk3036: Add core Soc start-up code
rk3036 only 4K size SRAM for SPL, so only support
timer, uart, sdram driver in SPL stage, when finish
initial sdram, back to bootrom.And in rk3036 sdmmc and
debug uart use same iomux, so if you want to boot from
sdmmc, you must disable debug uart.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fixed build error for chromebook_jerry, firefly-rk3288:
Signed-off-by: Simon Glass <sjg@chromium.org>

Series-changes: 8
- Fix build error for chromebook_jerry, firefly-rk3288
2015-12-01 08:07:22 -07:00

44 lines
1.0 KiB
Plaintext

if ARCH_ROCKCHIP
config ROCKCHIP_RK3288
bool "Support Rockchip RK3288"
help
The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
video interfaces supporting HDMI and eDP, several DDR3 options
and video codec support. Peripherals include Gigabit Ethernet,
USB2 host and OTG, SDIO, I2S, UART,s, SPI, I2C and PWMs.
config ROCKCHIP_RK3036
bool "Support Rockchip RK3036"
help
The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
including NEON and GPU, Mali-400 graphics, several DDR3 options
and video codec support. Peripherals include Gigabit Ethernet,
USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
config SYS_MALLOC_F
default y
config SPL_DM
default y
config DM_SERIAL
default y
config DM_SPI
default y
config DM_SPI_FLASH
default y
config DM_I2C
default y
config DM_GPIO
default y
source "arch/arm/mach-rockchip/rk3288/Kconfig"
source "arch/arm/mach-rockchip/rk3036/Kconfig"
endif