u-boot-brain/arch/riscv
Atish Patra 3cedc97479 RISCV: image: Add booti support
This patch adds booti support for RISC-V Linux kernel. The existing
bootm method will also continue to work as it is.

It depends on the following kernel patch which adds the header to the
flat Image. Gzip compressed Image (Image.gz) support is not enabled with
this patch.

https://patchwork.kernel.org/patch/10925543/

Tested on HiFive Unleashed and QEMU.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Karsten Merker <merker@debian.org>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
2019-05-09 16:47:52 +08:00
..
cpu riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is enabled 2019-05-09 16:46:46 +08:00
dts dts: switch spi-flash to jedec, spi-nor compatible 2019-04-12 10:54:27 +05:30
include/asm riscv: Introduce CONFIG_XIP to support booting from flash 2019-05-09 16:46:46 +08:00
lib RISCV: image: Add booti support 2019-05-09 16:47:52 +08:00
config.mk riscv: qemu: define standalone load address 2019-01-15 09:36:31 +08:00
Kconfig riscv: Introduce CONFIG_XIP to support booting from flash 2019-05-09 16:46:46 +08:00
Makefile riscv: add Kconfig entries for the code model 2018-12-18 09:56:26 +08:00