u-boot-brain/arch
Stefan Roese 226502e01b ppc4xx: Flush dcache after DDR2 autocalibration with caches on
Flush the dcache before removing the TLB with caches enabled.
Otherwise this might lead to problems later on, e.g. while booting
Linux (as seen on ICON-440SPe).

Signed-off-by: Stefan Roese <sr@denx.de>
2011-09-19 11:51:21 +02:00
..
arm led: remove camel casing of led identifiers globally 2011-09-13 08:30:52 +02:00
avr32 Unify timer_init() and cpu_init() prototypes 2011-08-01 15:10:15 +02:00
blackfin Merge branch 'master' of git://git.denx.de/u-boot-blackfin 2011-08-02 21:46:53 +02:00
m68k ColdFire:Clean up the CONFIG_STANDALONE_LOAD_ADDR usage 2011-09-04 22:46:55 +08:00
microblaze unify version_string 2011-07-28 17:22:53 +02:00
mips MIPS: mips32: fix wrong loop bound in flush_cache() 2011-09-03 10:43:45 +09:00
nios2 unify version_string 2011-07-28 17:22:53 +02:00
powerpc ppc4xx: Flush dcache after DDR2 autocalibration with caches on 2011-09-19 11:51:21 +02:00
sh sh: add calling mmc_initialize in board.c 2011-08-22 13:16:09 +09:00
sparc Convert ISO-8859 files to UTF-8 2011-08-04 23:34:02 +02:00
x86 Convert ISO-8859 files to UTF-8 2011-08-04 23:34:02 +02:00
.gitignore update include/asm/ gitignore after move 2010-05-07 00:17:30 +02:00