mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-15 15:46:16 +09:00
aff2523f69
Memory Type Range Registers are used to tell the CPU whether memory is cacheable and if so the cache write mode to use. Clean up the existing header file to follow style, and remove the unneeded code. These can speed up booting so should be supported. Add these to global_data so they can be requested while booting. We will apply the changes during relocation (in a later commit). Signed-off-by: Simon Glass <sjg@chromium.org>
23 lines
585 B
Makefile
23 lines
585 B
Makefile
#
|
|
# (C) Copyright 2006
|
|
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
|
#
|
|
# (C) Copyright 2002
|
|
# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
|
|
#
|
|
# SPDX-License-Identifier: GPL-2.0+
|
|
#
|
|
|
|
extra-y = start.o
|
|
obj-$(CONFIG_X86_RESET_VECTOR) += resetvec.o start16.o
|
|
obj-y += interrupts.o cpu.o call64.o
|
|
|
|
obj-$(CONFIG_SYS_COREBOOT) += coreboot/
|
|
obj-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += ivybridge/
|
|
obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/
|
|
obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/
|
|
obj-y += lapic.o
|
|
obj-y += mtrr.o
|
|
obj-$(CONFIG_PCI) += pci.o
|
|
obj-y += turbo.o
|