Jagan Teki aa30aae8b4 ram: rk3399: Add tsel control clock drive ... tsel contrl clock drives are required to configure PHY 929, 939 controls drive settings. Add support for these control clock for all dramtype sdrams. Thse control clock drives are configure via tsel_ckcs_select_p and tsel_ckcs_select_n variables. tsel_ckcs_select_n is PHY_DRV_ODT_34_3 value where as tsel_ckcs_select_p is retrived from IO settings for lpddr4 and rest uses PHY_DRV_ODT_34_3. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: YouMin Chen <cym@rock-chips.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>		2019-07-20 23:59:44 +08:00
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dmc-rk3368.c	rockchip: dmc: rk3368: update rank number for evb-px5	2019-05-08 17:34:12 +08:00
Kconfig	ram: rockchip: Kconfig: Add RK3399 LPDDR4 entry	2019-07-20 23:59:44 +08:00
Makefile	ram: rockchip: Add debug sdram driver	2019-07-19 11:11:09 +08:00
sdram_debug.c	ram: rk3399: debug: Add sdram_print_stride	2019-07-19 11:11:10 +08:00
sdram_rk322x.c	Revert "rockchip: rk322x: ram: enable DRAM init in SPL instead of TPL"	2019-05-08 17:34:12 +08:00
sdram_rk3128.c	rockchip: use 'arch-rockchip' as header file path	2019-05-01 00:00:05 +02:00
sdram_rk3188.c	rockchip: use 'arch-rockchip' as header file path	2019-05-01 00:00:05 +02:00
sdram_rk3288.c	rockchip: use 'arch-rockchip' as header file path	2019-05-01 00:00:05 +02:00
sdram_rk3328.c	rockchip: use 'arch-rockchip' as header file path	2019-05-01 00:00:05 +02:00
sdram_rk3399.c	ram: rk3399: Add tsel control clock drive	2019-07-20 23:59:44 +08:00