u-boot-brain/arch/arm/cpu/armv7/mx5
David Jander 9db1bfa110 ARM: MX51: PLL errata workaround
This is a port of the official PLL errata workaround from Freescale to
mainline u-boot.
The PLL's in the i.MX51 processor can go out of lock due to a metastable
condition in an analog flip-flop when used at high frequencies.
This workaround implements an undocumented feature in the PLL (dither
mode), which causes the effect of this failure to be much lower (in terms
of frequency deviation), avoiding system failure, or at least decreasing
the likelihood of system failure.

Signed-off-by: David Jander <david@protonic.nl>
2011-09-04 11:36:11 +02:00
..
asm-offsets.c MX5: Update to autogenerated asm-offsets.h 2011-07-14 15:41:24 +02:00
clock.c MX51: remove warning in clock.c 2010-10-28 11:08:52 +02:00
iomux.c MX5: Add initial support for MX53 processor 2011-02-02 00:54:41 +01:00
lowlevel_init.S ARM: MX51: PLL errata workaround 2011-09-04 11:36:11 +02:00
Makefile MX5: Update to autogenerated asm-offsets.h 2011-07-14 15:41:24 +02:00
soc.c MX5: Introduce a function for setting the chip select size 2011-07-04 10:55:26 +02:00
speed.c Move DECLARE_GLOBAL_DATA_PTR to file scope 2010-12-21 11:33:36 +01:00
timer.c Timer: Remove reset_timer_masked() 2011-07-26 14:54:15 +02:00