Lokesh Vutla 9c8f41beea arm: mach-k3: j7200: Add support for storing extended boot info from ROM ... Starting J7200 SoC, ROM supports for loading sysfw directly from boot image. ROM passes this information on number of images that are loaded to bootloader at certain location. Add support for storing this information before it gets corrupted. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com>		2020-08-11 20:34:46 +05:30
..
include/mach	arm: mach-k3: j7200: Add support for storing extended boot info from ROM	2020-08-11 20:34:46 +05:30
am6_init.c	arm: mach-k3: sysfw-loader: Add support for rom loading sysfw image	2020-08-11 20:34:46 +05:30
arm64-mmu.c	armv8: K3: j721e: Add DSP internal memory regions in MMU table	2020-03-16 12:32:47 +05:30
cache.S	arm: mach-k3: Clean non-coherent lines out of L3 cache	2020-08-11 10:18:27 +05:30
common.c	arm: mach-k3: j7200: Add support for SOC detection	2020-08-11 20:34:46 +05:30
common.h	arm: mach-k3: j7200: Add support for SOC detection	2020-08-11 20:34:46 +05:30
config_secure.mk	arm: mach-k3: Add secure device build support	2019-04-26 17:51:51 -04:00
config.mk	arm: mach-k3: Fix platform hang when SPL_MULTI_DTB_FIT is not enabled	2020-08-11 20:34:46 +05:30
j721e_init.c	arm: mach-k3: j7200: Add support for storing extended boot info from ROM	2020-08-11 20:34:46 +05:30
Kconfig	arm: K3: Increase default SYSFW image size allocation	2020-05-11 10:16:49 +05:30
lowlevel_init.S	armv7r: K3: Allow SPL to run only on core 0	2018-11-26 22:52:11 -05:00
Makefile	arm: mach-k3: Clean non-coherent lines out of L3 cache	2020-08-11 10:18:27 +05:30
r5_mpu.c	armv7R: K3: r5_mpu: Enable execute permission for MCU0 BTCM	2020-03-03 13:08:14 +05:30
security.c	common: Drop log.h from common header	2020-05-18 21:19:18 -04:00
sysfw-loader.c	arm: mach-k3: sysfw-loader: Add support for rom loading sysfw image	2020-08-11 20:34:46 +05:30