Alexander Graf 9bb367a590 arm64: Disable TTBR1 maps in EL1 ... When running in EL1, AArch64 knows two page table maps. One with addresses that start with all zeros (TTBR0) and one with addresses that start with all ones (TTBR1). In U-Boot we don't care about the high up maps, so just disable them to ensure we don't walk an invalid page table by accident. Reported-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Alexander Graf <agraf@suse.de>		2016-03-15 15:13:00 -04:00
..
arm11	ARM: cache: implement a default weak flush_cache() function	2015-08-12 20:47:48 -04:00
arm720t	ARM: ARM720t: remove empty asm/arch/hardware.h	2015-04-23 08:52:27 -04:00
arm920t	ARM: start.S: fix typo	2016-02-29 14:49:35 -05:00
arm926ejs	ARM: Various: Future-proof serial platdata	2016-03-14 19:18:48 -04:00
arm946es	ARM: start.S: fix typo	2016-02-29 14:49:35 -05:00
arm1136	ARM: start.S: fix typo	2016-02-29 14:49:35 -05:00
arm1176	ARM: start.S: fix typo	2016-02-29 14:49:35 -05:00
armv7	omap4: Check warm reset for reboot mode validity	2016-03-15 15:12:54 -04:00
armv7m	stm32: move stm32 specific code to mach-stm32	2016-01-20 10:19:41 -05:00
armv8	arm64: Disable TTBR1 maps in EL1	2016-03-15 15:13:00 -04:00
pxa	ARM: start.S: fix typo	2016-02-29 14:49:35 -05:00
sa1100	ARM: start.S: fix typo	2016-02-29 14:49:35 -05:00
Makefile	Various Makefiles: Add SPDX-License-Identifier tags	2015-11-10 09:19:52 -05:00
u-boot-spl.lds	dm: arm: Put driver model I2C drivers before legacy ones	2015-07-21 17:39:21 -06:00
u-boot.lds	ARM: Disable "DISCARD" for secure section if CONFIG_ARMV7_SECURE_BASE isn't defined	2016-01-31 16:32:56 +01:00