mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-19 08:28:51 +09:00
![Tom Rini](/assets/img/avatar_default.png)
Due to how the Makefile logic is we currently get DM_SPI support in SPL enabled by having DM_SPI enabled for full U-Boot but not having CONFIG_SPL_DM_SPI set. Add this missing option to boards that were inadvertently making use of it. Cc: Adam Ford <aford173@gmail.com> Cc: Akash Gajjar <akash@openedev.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Andy Yan <andy.yan@rock-chips.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Chee Hong Ang <chee.hong.ang@intel.com> Cc: Chin-Liang See <clsee@altera.com> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com> Cc: Heiko Schocher <hs@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Klaus Goger <klaus.goger@theobroma-systems.com> Cc: Levin Du <djw@t-chip.com.cn> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Luca Ceresoli <luca@lucaceresoli.net> Cc: Marek Vasut <marex@denx.de> Cc: Michal Simek <monstr@monstr.eu> Cc: Mike Looijmans <mike.looijmans@topic.nl> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Pavel Machek <pavel@denx.de> Cc: Peter Robinson <pbrobinson@gmail.com> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Cc: Suniel Mahesh <sunil@amarulasolutions.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: Wolfgang Grandegger <wg@aries-embedded.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
75 lines
1.8 KiB
Plaintext
75 lines
1.8 KiB
Plaintext
CONFIG_ARM=y
|
|
CONFIG_ARCH_ROCKCHIP=y
|
|
CONFIG_SYS_TEXT_BASE=0x00200000
|
|
CONFIG_ENV_OFFSET=0x3F8000
|
|
CONFIG_SPL_DM_SPI=y
|
|
CONFIG_ROCKCHIP_RK3368=y
|
|
CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
|
|
CONFIG_TPL_LIBCOMMON_SUPPORT=y
|
|
CONFIG_TPL_LIBGENERIC_SUPPORT=y
|
|
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
|
CONFIG_TARGET_EVB_PX5=y
|
|
CONFIG_SPL_STACK_R_ADDR=0x600000
|
|
CONFIG_NR_DRAM_BANKS=1
|
|
CONFIG_SPL=y
|
|
CONFIG_DEBUG_UART_BASE=0xFF1c0000
|
|
CONFIG_DEBUG_UART_CLOCK=24000000
|
|
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
|
CONFIG_SPL_SPI_SUPPORT=y
|
|
CONFIG_DEBUG_UART=y
|
|
CONFIG_ANDROID_BOOT_IMAGE=y
|
|
CONFIG_FIT=y
|
|
CONFIG_FIT_VERBOSE=y
|
|
CONFIG_SPL_LOAD_FIT=y
|
|
CONFIG_BOOTSTAGE=y
|
|
CONFIG_SPL_BOOTSTAGE=y
|
|
CONFIG_BOOTSTAGE_REPORT=y
|
|
CONFIG_BOOTSTAGE_FDT=y
|
|
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-px5-evb.dtb"
|
|
# CONFIG_DISPLAY_CPUINFO is not set
|
|
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
|
CONFIG_ARCH_EARLY_INIT_R=y
|
|
CONFIG_SPL_BOOTROM_SUPPORT=y
|
|
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
|
CONFIG_TPL_SYS_MALLOC_SIMPLE=y
|
|
CONFIG_SPL_STACK_R=y
|
|
CONFIG_SPL_ATF=y
|
|
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
|
|
CONFIG_TPL=y
|
|
CONFIG_CMD_MMC=y
|
|
CONFIG_CMD_CACHE=y
|
|
CONFIG_SPL_OF_CONTROL=y
|
|
CONFIG_TPL_OF_CONTROL=y
|
|
CONFIG_OF_LIVE=y
|
|
CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb"
|
|
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent"
|
|
CONFIG_TPL_OF_PLATDATA=y
|
|
CONFIG_ENV_IS_IN_MMC=y
|
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
# CONFIG_NET is not set
|
|
CONFIG_TPL_DM=y
|
|
CONFIG_REGMAP=y
|
|
CONFIG_SPL_REGMAP=y
|
|
CONFIG_TPL_REGMAP=y
|
|
CONFIG_SYSCON=y
|
|
CONFIG_SPL_SYSCON=y
|
|
CONFIG_TPL_SYSCON=y
|
|
CONFIG_CLK=y
|
|
CONFIG_SPL_CLK=y
|
|
CONFIG_TPL_CLK=y
|
|
CONFIG_MMC_DW=y
|
|
CONFIG_MMC_DW_ROCKCHIP=y
|
|
CONFIG_PINCTRL=y
|
|
CONFIG_SPL_PINCTRL=y
|
|
CONFIG_RAM=y
|
|
CONFIG_SPL_RAM=y
|
|
CONFIG_TPL_RAM=y
|
|
CONFIG_DM_RESET=y
|
|
CONFIG_DEBUG_UART_SHIFT=2
|
|
CONFIG_DEBUG_UART_SKIP_INIT=y
|
|
CONFIG_SYSRESET=y
|
|
CONFIG_PANIC_HANG=y
|
|
CONFIG_SPL_TINY_MEMSET=y
|
|
CONFIG_TPL_TINY_MEMSET=y
|
|
CONFIG_ERRNO_STR=y
|