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spi: Enable missing CONFIG_SPL_DM_SPI support

Browse Source 
Due to how the Makefile logic is we currently get DM_SPI support in SPL
enabled by having DM_SPI enabled for full U-Boot but not having
CONFIG_SPL_DM_SPI set.  Add this missing option to boards that were
inadvertently making use of it.

Cc: Adam Ford <aford173@gmail.com>
Cc: Akash Gajjar <akash@openedev.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Andy Yan <andy.yan@rock-chips.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Chee Hong Ang <chee.hong.ang@intel.com>
Cc: Chin-Liang See <clsee@altera.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Klaus Goger <klaus.goger@theobroma-systems.com>
Cc: Levin Du <djw@t-chip.com.cn>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Luca Ceresoli <luca@lucaceresoli.net>
Cc: Marek Vasut <marex@denx.de>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Mike Looijmans <mike.looijmans@topic.nl>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Peter Robinson <pbrobinson@gmail.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Suniel Mahesh <sunil@amarulasolutions.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
Cc: Wolfgang Grandegger <wg@aries-embedded.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
This commit is contained in:
Tom Rini 2020-06-16 19:06:29 -04:00
parent 2254f13216
commit 8f74e659c4
72 changed files with 72 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
configs/am57xx_evm_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_OMAP54XX=y
CONFIG_TARGET_AM57XX_EVM=y
CONFIG_NR_DRAM_BANKS=2

1
configs/am57xx_hs_evm_defconfig
View File

@ -5,6 +5,7 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_OMAP54XX=y
CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000

1
configs/am57xx_hs_evm_usb_defconfig
View File

@ -6,6 +6,7 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_OMAP54XX=y
CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000

1
configs/am65x_evm_a53_defconfig
View File

@ -9,6 +9,7 @@ CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x680000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y

1
configs/am65x_evm_r5_defconfig
View File

@ -10,6 +10,7 @@ CONFIG_TARGET_AM654_R5_EVM=y
CONFIG_ENV_SIZE=0x20000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y

1
configs/am65x_hs_evm_a53_defconfig
View File

@ -10,6 +10,7 @@ CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x680000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y

1
configs/am65x_hs_evm_r5_defconfig
View File

@ -11,6 +11,7 @@ CONFIG_TARGET_AM654_R5_EVM=y
CONFIG_ENV_SIZE=0x20000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y

1
configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig
View File

@ -3,6 +3,7 @@ CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000

1
configs/axm_defconfig
View File

@ -13,6 +13,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL=y

1
configs/brppt1_spi_defconfig
View File

@ -9,6 +9,7 @@ CONFIG_ENV_OFFSET=0x20000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_AM33XX=y
CONFIG_TARGET_BRPPT1=y
CONFIG_SPL_SERIAL_SUPPORT=y

1
configs/brsmarc1_defconfig
View File

@ -9,6 +9,7 @@ CONFIG_ENV_OFFSET=0x20000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_AM33XX=y
CONFIG_SYS_MPUCLK=600
CONFIG_TARGET_BRSMARC1=y

1
configs/chromebit_mickey_defconfig
View File

@ -3,6 +3,7 @@ CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00100000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_DM_SPI=y
CONFIG_ROCKCHIP_RK3288=y
# CONFIG_SPL_MMC_SUPPORT is not set
CONFIG_TARGET_CHROMEBIT_MICKEY=y

1
configs/chromebook_bob_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_DM_SPI=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_ROCKCHIP_BOOT_MODE_REG=0
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000

1
configs/chromebook_coral_defconfig
View File

@ -1,6 +1,7 @@
CONFIG_X86=y
CONFIG_SYS_TEXT_BASE=0x1110000
CONFIG_SYS_MALLOC_F_LEN=0x3d00
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0xf000
CONFIG_NR_DRAM_BANKS=8
CONFIG_BOOTSTAGE_STASH_ADDR=0xfef00000

1
configs/chromebook_jerry_defconfig
View File

@ -3,6 +3,7 @@ CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00100000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_DM_SPI=y
CONFIG_ROCKCHIP_RK3288=y
# CONFIG_SPL_MMC_SUPPORT is not set
CONFIG_SPL_STACK_R_ADDR=0x80000

1
configs/chromebook_link64_defconfig
View File

@ -3,6 +3,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_SPL_DM_SPI=y
CONFIG_NR_DRAM_BANKS=8
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0x3f8

1
configs/chromebook_minnie_defconfig
View File

@ -3,6 +3,7 @@ CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00100000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_DM_SPI=y
CONFIG_ROCKCHIP_RK3288=y
# CONFIG_SPL_MMC_SUPPORT is not set
CONFIG_TARGET_CHROMEBOOK_MINNIE=y

1
configs/chromebook_samus_tpl_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x1a00
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_SPL_DM_SPI=y
CONFIG_NR_DRAM_BANKS=8
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0x3f8

1
configs/chromebook_speedy_defconfig
View File

@ -3,6 +3,7 @@ CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00100000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_DM_SPI=y
CONFIG_ROCKCHIP_RK3288=y
# CONFIG_SPL_MMC_SUPPORT is not set
CONFIG_TARGET_CHROMEBOOK_SPEEDY=y

1
configs/cm_t43_defconfig
View File

@ -8,6 +8,7 @@ CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_AM43XX=y
CONFIG_TARGET_CM_T43=y
CONFIG_SPL_MMC_SUPPORT=y

1
configs/da850evm_defconfig
View File

@ -12,6 +12,7 @@ CONFIG_ENV_OFFSET=0x80000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL=y

1
configs/da850evm_nand_defconfig
View File

@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x0
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL=y
CONFIG_SPL_TEXT_BASE=0x80000000

1
configs/dra7xx_evm_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SYS_MALLOC_F_LEN=0x18000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_OMAP54XX=y
CONFIG_TARGET_DRA7XX_EVM=y
CONFIG_NR_DRAM_BANKS=2

1
configs/dra7xx_hs_evm_defconfig
View File

@ -5,6 +5,7 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SYS_MALLOC_F_LEN=0x18000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_OMAP54XX=y
CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000

1
configs/dra7xx_hs_evm_usb_defconfig
View File

@ -6,6 +6,7 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SYS_MALLOC_F_LEN=0x18000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_OMAP54XX=y
CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000

1
configs/evb-px5_defconfig
View File

@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_SPL_DM_SPI=y
CONFIG_ROCKCHIP_RK3368=y
CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
CONFIG_TPL_LIBCOMMON_SUPPORT=y

1
configs/j721e_evm_a72_defconfig
View File

@ -10,6 +10,7 @@ CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x680000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y

1
configs/j721e_evm_r5_defconfig
View File

@ -10,6 +10,7 @@ CONFIG_TARGET_J721E_R5_EVM=y
CONFIG_ENV_SIZE=0x20000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y

1
configs/j721e_hs_evm_a72_defconfig
View File

@ -9,6 +9,7 @@ CONFIG_TARGET_J721E_A72_EVM=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x680000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y

1
configs/j721e_hs_evm_r5_defconfig
View File

@ -11,6 +11,7 @@ CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x680000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y

1
configs/k2e_evm_defconfig
View File

@ -11,6 +11,7 @@ CONFIG_TARGET_K2E_EVM=y
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x100000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL=y

1
configs/k2g_evm_defconfig
View File

@ -10,6 +10,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_K2G_EVM=y
CONFIG_ENV_SIZE=0x40000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL=y

1
configs/k2hk_evm_defconfig
View File

@ -11,6 +11,7 @@ CONFIG_TARGET_K2HK_EVM=y
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x100000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL=y

1
configs/k2l_evm_defconfig
View File

@ -11,6 +11,7 @@ CONFIG_TARGET_K2L_EVM=y
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x100000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL=y

1
configs/lion-rk3368_defconfig
View File

@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_SPL_DM_SPI=y
CONFIG_ROCKCHIP_RK3368=y
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
CONFIG_TPL_LIBCOMMON_SUPPORT=y

1
configs/pinebook-pro-rk3399_defconfig
View File

@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_DM_SPI=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_PINEBOOK_PRO_RK3399=y
CONFIG_NR_DRAM_BANKS=1

1
configs/puma-rk3399_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_DM_SPI=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0
CONFIG_TARGET_PUMA_RK3399=y

1
configs/qemu-x86_64_defconfig
View File

@ -3,6 +3,7 @@ CONFIG_SYS_TEXT_BASE=0x1110000
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_ENV_SIZE=0x40000
CONFIG_MAX_CPUS=2
CONFIG_SPL_DM_SPI=y
CONFIG_NR_DRAM_BANKS=8
CONFIG_DEBUG_UART_BASE=0x3f8
CONFIG_DEBUG_UART_CLOCK=1843200

1
configs/roc-pc-mezzanine-rk3399_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_ENV_SIZE=0x6000
CONFIG_ENV_OFFSET=0x460000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_SPL_DM_SPI=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_ROC_PC_RK3399=y
CONFIG_NR_DRAM_BANKS=1

1
configs/roc-pc-rk3399_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_ENV_SIZE=0x6000
CONFIG_ENV_OFFSET=0x460000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_SPL_DM_SPI=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_ROC_PC_RK3399=y
CONFIG_NR_DRAM_BANKS=1

1
configs/rockpro64-rk3399_defconfig
View File

@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_ENV_SIZE=0x8000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_SPL_DM_SPI=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_ROCKPRO64_RK3399=y
CONFIG_NR_DRAM_BANKS=1

1
configs/sama5d27_wlsom1_ek_qspiflash_defconfig
View File

@ -9,6 +9,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL=y

1
configs/sama5d2_xplained_spiflash_defconfig
View File

@ -12,6 +12,7 @@ CONFIG_ENV_OFFSET=0x6000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1

1
configs/sama5d3xek_spiflash_defconfig
View File

@ -12,6 +12,7 @@ CONFIG_ENV_OFFSET=0x6000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1

1
configs/sama5d4_xplained_spiflash_defconfig
View File

@ -12,6 +12,7 @@ CONFIG_ENV_OFFSET=0x6000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1

1
configs/sama5d4ek_spiflash_defconfig
View File

@ -12,6 +12,7 @@ CONFIG_ENV_OFFSET=0x6000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1

1
configs/sifive_fu540_defconfig
View File

@ -2,6 +2,7 @@ CONFIG_RISCV=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_ENV_SIZE=0x20000
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL=y

1
configs/socfpga_agilex_defconfig
View File

@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x200
CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y
CONFIG_IDENT_STRING="socfpga_agilex"

1
configs/socfpga_arria10_defconfig
View File

@ -3,6 +3,7 @@ CONFIG_ARCH_SOCFPGA=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
CONFIG_IDENT_STRING="socfpga_arria10"

1
configs/socfpga_arria5_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DISTRO_DEFAULTS=y

1
configs/socfpga_cyclone5_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DISTRO_DEFAULTS=y

1
configs/socfpga_dbm_soc1_defconfig
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@ -4,6 +4,7 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_FIT=y

1
configs/socfpga_de0_nano_soc_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DISTRO_DEFAULTS=y

1
configs/socfpga_de10_nano_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_TARGET_SOCFPGA_TERASIC_DE10_NANO=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DISTRO_DEFAULTS=y

1
configs/socfpga_de1_soc_defconfig
View File

@ -3,6 +3,7 @@ CONFIG_ARCH_SOCFPGA=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_TARGET_SOCFPGA_TERASIC_DE1_SOC=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DISTRO_DEFAULTS=y

1
configs/socfpga_is1_defconfig
View File

@ -5,6 +5,7 @@ CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
CONFIG_TARGET_SOCFPGA_IS1=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000

1
configs/socfpga_mcvevk_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_TARGET_SOCFPGA_ARIES_MCVEVK=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DISTRO_DEFAULTS=y

1
configs/socfpga_sockit_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DISTRO_DEFAULTS=y

1
configs/socfpga_socrates_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x4400
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DISTRO_DEFAULTS=y

1
configs/socfpga_sr1500_defconfig
View File

@ -5,6 +5,7 @@ CONFIG_ENV_OFFSET=0xE0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
CONFIG_TARGET_SOCFPGA_SR1500=y
CONFIG_ENV_OFFSET_REDUND=0xF0000

1
configs/socfpga_stratix10_defconfig
View File

@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x200
CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y
CONFIG_IDENT_STRING="socfpga_stratix10"

1
configs/socfpga_vining_fpga_defconfig
View File

@ -5,6 +5,7 @@ CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_TARGET_SOCFPGA_SOFTING_VINING_FPGA=y
CONFIG_ENV_OFFSET_REDUND=0x110000
CONFIG_SPL_TEXT_BASE=0xFFFF0000

1
configs/stm32mp15_basic_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_ENV_OFFSET=0x280000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL=y
CONFIG_TARGET_ST_STM32MP15x=y

1
configs/stm32mp15_dhcom_basic_defconfig
View File

@ -3,6 +3,7 @@ CONFIG_ARCH_STM32MP=y
CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_ENV_SIZE=0x4000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL=y
CONFIG_TARGET_DH_STM32MP1_PDK2=y

1
configs/stm32mp15_dhcor_basic_defconfig
View File

@ -3,6 +3,7 @@ CONFIG_ARCH_STM32MP=y
CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_ENV_SIZE=0x4000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL=y
CONFIG_TARGET_DH_STM32MP1_PDK2=y

1
configs/taurus_defconfig
View File

@ -15,6 +15,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL=y

1
configs/topic_miami_defconfig
View File

@ -7,6 +7,7 @@ CONFIG_SYS_TEXT_BASE=0x4000000
CONFIG_ENV_SIZE=0x8000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xe0000000

1
configs/topic_miamilite_defconfig
View File

@ -7,6 +7,7 @@ CONFIG_SYS_TEXT_BASE=0x4000000
CONFIG_ENV_SIZE=0x8000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xe0000000

1
configs/topic_miamiplus_defconfig
View File

@ -7,6 +7,7 @@ CONFIG_SYS_TEXT_BASE=0x4000000
CONFIG_ENV_SIZE=0x8000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xe0000000

1
configs/xilinx_zynq_virt_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_ARCH_ZYNQ=y
CONFIG_SYS_TEXT_BASE=0x4000000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y

1
configs/xilinx_zynqmp_virt_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y

1
configs/zynq_cse_qspi_defconfig
View File

@ -7,6 +7,7 @@ CONFIG_SYS_TEXT_BASE=0xFFFC0000
CONFIG_ENV_SIZE=0x190
CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
CONFIG_SYS_MALLOC_LEN=0x1000
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0x0