Simon Glass c30b7adbca common: Move interrupt functions into a new header ... These functions do not use driver model but are fairly widely used in U-Boot. But it is not clear that they will use driver model anytime soon, so we don't want to label them as 'legacy'. Move them to a new irq_func.h header file. Avoid the name 'irq.h' since it is widely used in U-Boot already. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>		2019-12-02 18:25:00 -05:00
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andes_plic.c	riscv: andes_plic: init plic by scanning each cpu node	2019-09-03 09:30:54 +08:00
andes_plmt.c	riscv: Add a SYSCON driver for Andestech's PLMT	2019-04-08 09:45:08 +08:00
asm-offsets.c	riscv: Introduce CONFIG_XIP to support booting from flash	2019-05-09 16:46:46 +08:00
boot.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
bootm.c	riscv: boot images passed to bootm on all harts	2019-04-08 09:44:26 +08:00
cache.c	common: Move some cache and MMU functions out of common.h	2019-12-02 18:23:55 -05:00
crt0_riscv_efi.S	efi_loader: use predefined constants in crt0_*_efi.S	2019-07-16 22:17:14 +00:00
elf_riscv32_efi.lds	SPDX: Convert single license tags to Linux Kernel style	2018-05-29 14:44:21 +08:00
elf_riscv64_efi.lds	SPDX: Convert single license tags to Linux Kernel style	2018-05-29 14:44:21 +08:00
image.c	RISC-V: Align boot image header with Linux	2019-10-18 09:04:19 +08:00
interrupts.c	common: Move interrupt functions into a new header	2019-12-02 18:25:00 -05:00
Makefile	riscv: add SPL support	2019-08-26 16:07:42 +08:00
mkimage_fit_opensbi.sh	riscv: add a generic FIT generator script	2019-08-26 16:07:42 +08:00
rdtime.c	riscv: Implement riscv_get_time() API using rdtime instruction	2018-12-18 09:56:27 +08:00
reloc_riscv_efi.c	riscv: Remove unused _relocate arguments	2018-07-19 16:31:37 -04:00
reset.c	riscv: cosmetic: Reword do_reset() printf message.	2018-10-03 17:49:27 +08:00
sbi_ipi.c	riscv: implement IPI platform functions using SBI	2019-04-08 09:44:26 +08:00
setjmp.S	riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I	2018-11-26 13:57:29 +08:00
sifive_clint.c	riscv: Add a SYSCON driver for SiFive's Core Local Interruptor	2018-12-18 09:56:26 +08:00
smp.c	common: Move ARM cache operations out of common.h	2019-12-02 18:24:58 -05:00
spl.c	common: Move ARM cache operations out of common.h	2019-12-02 18:24:58 -05:00