Marek Vasut 8e9e62c946 ddr: altera: Fix scc_mgr_set() argument order ... The code should be setting registers to zero, not one register to value. Swap the order of arguments to correct the behavior. The behavior is now in-line with code generated by Quartus 15.1 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>		2016-04-20 11:28:44 +02:00
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altera	ddr: altera: Fix scc_mgr_set() argument order	2016-04-20 11:28:44 +02:00
fsl	Fix typo choosen in comments and printf logs	2016-03-27 09:12:23 -04:00
marvell	arm: mvebu: Fix ddr3_init() cpu config	2016-03-24 09:36:40 +01:00
microchip	drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32.	2016-02-01 22:14:01 +01:00