u-boot-brain/arch/mips/lib
Paul Burton 8cb4817d0f MIPS: Probe cache line sizes once during boot
Rather than probing the cache line sizes on every call of any cache
maintenance function, probe them once during boot & store the values in
the global data structure for later use. This will reduce the overhead
of the cache maintenance functions, which isn't a big deal yet but
becomes more important once L2 caches which may expose their properties
via coprocessor 2 or the CM are supported.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-09-21 15:04:04 +02:00
..
ashldi3.c dm: mips: Import libgcc components from Linux 2012-08-17 20:13:48 +02:00
ashrdi3.c dm: mips: Import libgcc components from Linux 2012-08-17 20:13:48 +02:00
bootm.c libfdt: Introduce new ARCH_FIXUP_FDT option 2016-07-31 19:37:08 -06:00
cache_init.S MIPS: Split I & D cache line size config 2016-05-31 09:44:24 +02:00
cache.c MIPS: Probe cache line sizes once during boot 2016-09-21 15:04:04 +02:00
libgcc.h dm: mips: Import libgcc components from Linux 2012-08-17 20:13:48 +02:00
lshrdi3.c dm: mips: Import libgcc components from Linux 2012-08-17 20:13:48 +02:00
Makefile MIPS: Support dynamic I/O port base address 2016-02-01 22:13:25 +01:00