u-boot-brain/arch/riscv
Bin Meng 89419279f4 riscv: Group assembly optimized implementation of memory routines into a submenu
Currently all assembly optimized implementation of memory routines
show up at the top level of the RISC-V architecture Kconfig menu.
Let's group them together into a submenu.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-17 16:47:33 +08:00
..
cpu riscv: Split SiFive CLINT support between SPL and U-Boot proper 2021-05-17 16:42:24 +08:00
dts riscv: Don't reserve AI ram in k210 dts 2021-05-14 16:20:50 +08:00
include/asm riscv: Split SiFive CLINT support between SPL and U-Boot proper 2021-05-17 16:42:24 +08:00
lib riscv: Fix memmove and optimise memcpy when misalign 2021-05-17 16:47:33 +08:00
config.mk kconfig / kbuild: Re-sync with Linux 4.19 2020-04-10 11:18:32 -04:00
Kconfig riscv: Group assembly optimized implementation of memory routines into a submenu 2021-05-17 16:47:33 +08:00
Makefile riscv: add Kconfig entries for the code model 2018-12-18 09:56:26 +08:00