Lukas Auer 862e2e75e8 riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I ... RISC-V defines the base integer instruction sets as RV32I and RV64I. Rename CPU_RISCV_32 and CPU_RISCV_64 to ARCH_RV32I and ARCH_RV64I to match this convention. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>		2018-11-26 13:57:29 +08:00
..
cpu	riscv: Move do_reset() to a common place	2018-10-03 17:48:43 +08:00
dts	riscv: ae350: Clean up mixed tabs and spaces in the dts	2018-10-03 17:48:19 +08:00
include/asm	Use _AC and UL macros from linux/const.h	2018-11-20 13:08:15 +01:00
lib	riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I	2018-11-26 13:57:29 +08:00
config.mk	Kbuild: add LDFLAGS_STANDALONE	2018-11-18 16:02:23 +01:00
Kconfig	riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I	2018-11-26 13:57:29 +08:00
Makefile	riscv: Make start.S available for all targets	2018-10-03 17:48:14 +08:00