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u-boot-brain/arch/arm/cpu/armv8/fsl-layerscape
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Meenakshi Aggarwal 3a187cff7a armv8: lx2162a: Add Soc changes to support LX2162A 
LX2162 is LX2160 based SoC, it has same die as of LX2160
with different packaging.

LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module,
microSD card, eMMC support, serial console, qspi nor flash, qsgmii,
sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes
interface to support three PCIe gen3 interface.

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[Fixed whitespace errors]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
..
doc armv8: lx2162a: Add Soc changes to support LX2162A 2020-12-10 13:56:39 +05:30
cpu.c armv8: lx2162a: Add Soc changes to support LX2162A 2020-12-10 13:56:39 +05:30
cpu.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
fdt.c armv8: layerscape: don't remove crypto node if just partially disabled 2020-10-23 16:52:09 +05:30
fsl_lsch2_serdes.c common: Drop linux/delay.h from common header 2020-05-18 21:19:23 -04:00
fsl_lsch2_speed.c common: Move clock functions into a new file 2020-01-17 13:27:29 -05:00
fsl_lsch3_serdes.c armv8: lx2162a: Add Soc changes to support LX2162A 2020-12-10 13:56:39 +05:30
fsl_lsch3_speed.c armv8: lx2162a: Add Soc changes to support LX2162A 2020-12-10 13:56:39 +05:30
icid.c armv8: fsl-layerscape: make icid setup endianness aware 2019-08-22 09:07:36 +05:30
Kconfig armv8: lx2162a: Add Soc changes to support LX2162A 2020-12-10 13:56:39 +05:30
lowlevel.S armv8: layerscape: move spin table into own module 2020-07-27 14:16:27 +05:30
ls1012a_serdes.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
ls1028_ids.c common: Drop log.h from common header 2020-05-18 21:19:18 -04:00
ls1028a_serdes.c armv8: ls1028a_serdes: Add few missing serdes protocols 2020-01-24 14:28:26 +05:30
ls1043_ids.c armv8: fsl-layerscape: fix SEC QI ICID setup 2019-03-03 22:01:09 +05:30
ls1043a_psci.S SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
ls1043a_serdes.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
ls1046_ids.c armv8: fsl-layerscape: fix SEC QI ICID setup 2019-03-03 22:01:09 +05:30
ls1046a_serdes.c armv8: ls1046afrwy: Add support for LS1046AFRWY platform 2019-06-19 12:54:57 +05:30
ls1088_ids.c armv8: fsl-layerscape: guard caam specific defines 2019-11-08 11:13:38 +05:30
ls1088a_serdes.c armv8: fsl-layerscape: LS1044A/1048A: enable Only 1x 10GE port 2020-01-24 14:28:26 +05:30
ls2080a_serdes.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
ls2088_ids.c armv8: ls2088a: add icid setup for platform devices 2019-11-08 11:13:38 +05:30
lx2160_ids.c armv8: lx2160a: add icid setup for platform devices 2019-11-08 11:13:38 +05:30
lx2160a_serdes.c armv8: lx2162a: Add Soc changes to support LX2162A 2020-12-10 13:56:39 +05:30
Makefile armv8: lx2162a: Add Soc changes to support LX2162A 2020-12-10 13:56:39 +05:30
mp.c armv8: layerscape: relocate spin table if EFI_LOADER is enabled 2020-07-27 14:16:28 +05:30
ppa.c common: Drop log.h from common header 2020-05-18 21:19:18 -04:00
soc.c armv8: lx2162a: Add Soc changes to support LX2162A 2020-12-10 13:56:39 +05:30
spintable.S armv8: layerscape: rework spin table 2020-07-27 14:16:28 +05:30
spl.c common: Drop log.h from common header 2020-05-18 21:19:18 -04:00