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https://github.com/brain-hackers/u-boot-brain
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13539ba705
Add common DPTF (Intel Dynamic Performance and Thermal Framework) files, taken from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org>
58 lines
919 B
Plaintext
58 lines
919 B
Plaintext
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2016 Intel Corporation.
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*/
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Device (TFN1)
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{
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Name (_HID, "INT3404")
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Name (_UID, 0)
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Name (_STR, Unicode("Fan Control"))
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/* _FIF: Fan Information */
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Name (_FIF, Package ()
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{
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0, // Revision
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1, // Fine Grained Control
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2, // Step Size
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0 // No Low Speed Notification
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})
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/* Return Fan Performance States defined by mainboard */
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Method (_FPS)
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{
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Return (\_SB.DFPS)
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}
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Name (TFST, Package ()
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{
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0, // Revision
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0x00, // Control
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0x00 // Speed
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})
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/* _FST: Fan current Status */
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Method (_FST, 0, Serialized,,PkgObj)
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{
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/* Fill in TFST with current control. */
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Store (\_SB.PCI0.LPCB.EC0.FAND, Index (TFST, 1))
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Return (TFST)
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}
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/* _FSL: Fan Speed Level */
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Method (_FSL, 1, Serialized)
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{
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Store (Arg0, \_SB.PCI0.LPCB.EC0.FAND)
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}
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Method (_STA)
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{
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If (LEqual (\DPTE, One))
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{
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Return (0xF)
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} Else {
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Return (0x0)
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}
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}
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}
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