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https://github.com/brain-hackers/u-boot-brain
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x86: acpi: Add DPTF asl files
Add common DPTF (Intel Dynamic Performance and Thermal Framework) files, taken from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass
Bin Meng
parent
14f643d1a2
commit
13539ba705
65
arch/x86/include/asm/acpi/dptf/charger.asl
Normal file
65
arch/x86/include/asm/acpi/dptf/charger.asl
Normal file
@ -0,0 +1,65 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2014 Google Inc.
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* Copyright (C) 2016 Intel Corporation.
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*/
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Device (TCHG)
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{
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Name (_HID, "INT3403")
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Name (_UID, 0)
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Name (PTYP, 0x0B)
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Name (_STR, Unicode("Battery Charger"))
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Method (_STA)
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{
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If (LEqual (\DPTE, One)) {
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Return (0xF)
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} Else {
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Return (0x0)
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}
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}
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/* Return charger performance states defined by mainboard */
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Method (PPSS)
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{
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Return (\_SB.CHPS)
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}
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/* Return maximum charger current limit */
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Method (PPPC)
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{
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/* Convert size of PPSS table to index */
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Store (SizeOf (\_SB.CHPS), Local0)
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Decrement (Local0)
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/* Check if charging is disabled (AC removed) */
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If (LEqual (\_SB.PCI0.LPCB.EC0.ACEX, Zero)) {
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/* Return last power state */
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Return (Local0)
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} Else {
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/* Return highest power state */
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Return (0)
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}
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Return (0)
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}
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/* Set charger current limit */
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Method (SPPC, 1)
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{
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/* Retrieve Control (index 4) for specified PPSS level */
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Store (DeRefOf (Index (DeRefOf (Index
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(\_SB.CHPS, ToInteger (Arg0))), 4)), Local0)
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/* Pass Control value to EC to limit charging */
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\_SB.PCI0.LPCB.EC0.CHGS (Local0)
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}
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/* Initialize charger participant */
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Method (INIT)
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{
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/* Disable charge limit */
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\_SB.PCI0.LPCB.EC0.CHGD ()
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}
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}
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186
arch/x86/include/asm/acpi/dptf/cpu.asl
Normal file
186
arch/x86/include/asm/acpi/dptf/cpu.asl
Normal file
@ -0,0 +1,186 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2014 Google Inc.
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* Copyright (C) 2016 Intel Corporation.
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*/
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External (\_PR.CP00._PSS, PkgObj)
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External (\_PR.CP00._TSS, PkgObj)
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External (\_PR.CP00._TPC, MethodObj)
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External (\_PR.CP00._PTC, PkgObj)
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External (\_PR.CP00._TSD, PkgObj)
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External (\_SB.MPDL, IntObj)
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Device (DPTF_CPU_DEVICE)
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{
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Name(_ADR, DPTF_CPU_ADDR)
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Method (_STA)
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{
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If (LEqual (\DPTE, One)) {
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Return (0xF)
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} Else {
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Return (0x0)
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}
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}
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/*
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* Processor Throttling Controls
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*/
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Method (_TSS)
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{
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If (CondRefOf (\_PR.CP00._TSS)) {
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Return (\_PR.CP00._TSS)
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} Else {
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Return (Package ()
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{
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Package () { 0, 0, 0, 0, 0 }
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})
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}
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}
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Method (_TPC)
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{
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If (CondRefOf (\_PR.CP00._TPC)) {
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Return (\_PR.CP00._TPC)
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} Else {
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Return (0)
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}
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}
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Method (_PTC)
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{
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If (CondRefOf (\_PR.CP00._PTC)) {
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Return (\_PR.CP00._PTC)
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} Else {
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Return (Package ()
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{
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Buffer () { 0 },
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Buffer () { 0 }
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})
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}
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}
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Method (_TSD)
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{
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If (CondRefOf (\_PR.CP00._TSD)) {
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Return (\_PR.CP00._TSD)
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} Else {
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Return (Package ()
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{
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Package () { 5, 0, 0, 0, 0 }
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})
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}
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}
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Method (_TDL)
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{
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If (CondRefOf (\_PR.CP00._TSS)) {
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Store (SizeOf (\_PR.CP00._TSS), Local0)
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Decrement (Local0)
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Return (Local0)
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} Else {
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Return (0)
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}
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}
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/*
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* Processor Performance Control
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*/
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Method (_PPC)
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{
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Return (0)
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}
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Method (SPPC, 1)
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{
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Store (Arg0, \PPCM)
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/* Notify OS to re-read _PPC limit on each CPU */
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\PPCN ()
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}
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Method (_PSS)
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{
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If (CondRefOf (\_PR.CP00._PSS)) {
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Return (\_PR.CP00._PSS)
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} Else {
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Return (Package ()
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{
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Package () { 0, 0, 0, 0, 0, 0 }
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})
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}
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}
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Method (_PDL)
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{
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/* Check for mainboard specific _PDL override */
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If (CondRefOf (\_SB.MPDL)) {
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Return (\_SB.MPDL)
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} ElseIf (CondRefOf (\_PR.CP00._PSS)) {
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Store (SizeOf (\_PR.CP00._PSS), Local0)
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Decrement (Local0)
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Return (Local0)
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} Else {
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Return (0)
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}
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}
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/* Return PPCC table defined by mainboard */
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Method (PPCC)
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{
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Return (\_SB.MPPC)
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}
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#ifdef DPTF_CPU_CRITICAL
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Method (_CRT)
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{
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Return (\_SB.DPTF.CTOK (DPTF_CPU_CRITICAL))
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}
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#endif
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#ifdef DPTF_CPU_PASSIVE
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Method (_PSV)
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{
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Return (\_SB.DPTF.CTOK (DPTF_CPU_PASSIVE))
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}
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#endif
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#ifdef DPTF_CPU_ACTIVE_AC0
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Method (_AC0)
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{
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Return (\_SB.DPTF.CTOK (DPTF_CPU_ACTIVE_AC0))
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}
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#endif
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#ifdef DPTF_CPU_ACTIVE_AC1
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Method (_AC1)
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{
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Return (\_SB.DPTF.CTOK (DPTF_CPU_ACTIVE_AC1))
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}
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#endif
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#ifdef DPTF_CPU_ACTIVE_AC2
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Method (_AC2)
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{
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Return (\_SB.DPTF.CTOK (DPTF_CPU_ACTIVE_AC2))
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}
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#endif
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#ifdef DPTF_CPU_ACTIVE_AC3
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Method (_AC3)
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{
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Return (\_SB.DPTF.CTOK (DPTF_CPU_ACTIVE_AC3))
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}
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#endif
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#ifdef DPTF_CPU_ACTIVE_AC4
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Method (_AC4)
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{
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Return (\_SB.DPTF.CTOK (DPTF_CPU_ACTIVE_AC4))
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}
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#endif
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}
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121
arch/x86/include/asm/acpi/dptf/dptf.asl
Normal file
121
arch/x86/include/asm/acpi/dptf/dptf.asl
Normal file
@ -0,0 +1,121 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2014 Google Inc.
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* Copyright (C) 2016 Intel Corporation.
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*/
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Device (DPTF)
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{
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Name (_HID, EISAID ("INT3400"))
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Name (_UID, 0)
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Name (IDSP, Package()
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{
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/* DPPM Passive Policy 1.0 */
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ToUUID ("42A441D6-AE6A-462B-A84B-4A8CE79027D3"),
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/* DPPM Critical Policy */
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ToUUID ("97C68AE7-15FA-499c-B8C9-5DA81D606E0A"),
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/* DPPM Cooling Policy */
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ToUUID ("16CAF1B7-DD38-40ED-B1C1-1B8A1913D531"),
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#ifdef DPTF_ENABLE_FAN_CONTROL
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/* DPPM Active Policy */
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ToUUID ("3A95C389-E4B8-4629-A526-C52C88626BAE"),
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#endif
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})
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Method (_STA)
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{
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If (LEqual (\DPTE, One)) {
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Return (0xF)
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} Else {
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Return (0x0)
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}
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}
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/*
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* Arg0: Buffer containing UUID
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* Arg1: Integer containing Revision ID of buffer format
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* Arg2: Integer containing count of entries in Arg3
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* Arg3: Buffer containing list of DWORD capabilities
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* Return: Buffer containing list of DWORD capabilities
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*/
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Method (_OSC, 4, Serialized)
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{
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/* Check for Passive Policy UUID */
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If (LEqual (DeRefOf (Index (IDSP, 0)), Arg0)) {
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/* Initialize Thermal Devices */
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^TINI ()
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#ifdef DPTF_ENABLE_CHARGER
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/* Initialize Charger Device */
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^TCHG.INIT ()
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#endif
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}
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Return (Arg3)
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}
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/* Priority based _TRT */
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Name (TRTR, 1)
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Method (_TRT)
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{
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Return (\_SB.DTRT)
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}
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#ifdef DPTF_ENABLE_FAN_CONTROL
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/* _ART : Active Cooling Relationship Table */
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Method (_ART)
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{
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Return (\_SB.DART)
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}
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#endif
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/* Convert from Degrees C to 1/10 Kelvin for ACPI */
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Method (CTOK, 1) {
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/* 10th of Degrees C */
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Multiply (Arg0, 10, Local0)
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/* Convert to Kelvin */
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Add (Local0, 2732, Local0)
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Return (Local0)
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}
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/* Convert from 1/10 Kelvin to Degrees C for ACPI */
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Method (KTOC, 1) {
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If (LLessEqual (Arg0, 2732)) {
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Return (0)
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}
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/* Convert to Celsius */
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Subtract (Arg0, 2732, Local0)
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/* Convert from 10th of degrees */
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Divide (Local0, 10,, Local0)
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Return (Local0)
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}
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/* Include Thermal Participants */
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#include "thermal.asl"
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#ifdef DPTF_ENABLE_CHARGER
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/* Include Charger Participant */
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#include "charger.asl"
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#endif
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#ifdef DPTF_ENABLE_FAN_CONTROL
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/* Include Fan Participant */
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#include "fan.asl"
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#endif
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}
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Scope (\_SB.PCI0)
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{
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#include "cpu.asl"
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}
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57
arch/x86/include/asm/acpi/dptf/fan.asl
Normal file
57
arch/x86/include/asm/acpi/dptf/fan.asl
Normal file
@ -0,0 +1,57 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2016 Intel Corporation.
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*/
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Device (TFN1)
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{
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Name (_HID, "INT3404")
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Name (_UID, 0)
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Name (_STR, Unicode("Fan Control"))
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/* _FIF: Fan Information */
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Name (_FIF, Package ()
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{
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0, // Revision
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1, // Fine Grained Control
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2, // Step Size
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0 // No Low Speed Notification
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})
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/* Return Fan Performance States defined by mainboard */
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Method (_FPS)
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{
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Return (\_SB.DFPS)
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}
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Name (TFST, Package ()
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{
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0, // Revision
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0x00, // Control
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0x00 // Speed
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})
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/* _FST: Fan current Status */
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Method (_FST, 0, Serialized,,PkgObj)
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{
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/* Fill in TFST with current control. */
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Store (\_SB.PCI0.LPCB.EC0.FAND, Index (TFST, 1))
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Return (TFST)
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}
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/* _FSL: Fan Speed Level */
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Method (_FSL, 1, Serialized)
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{
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Store (Arg0, \_SB.PCI0.LPCB.EC0.FAND)
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}
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Method (_STA)
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{
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If (LEqual (\DPTE, One))
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{
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Return (0xF)
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} Else {
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Return (0x0)
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}
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}
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}
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521
arch/x86/include/asm/acpi/dptf/thermal.asl
Normal file
521
arch/x86/include/asm/acpi/dptf/thermal.asl
Normal file
@ -0,0 +1,521 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
|
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* Copyright (C) 2014 Google Inc.
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* Copyright (C) 2016 Intel Corporation.
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*/
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/* Thermal Threshold Event Handler */
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#define HAVE_THERM_EVENT_HANDLER
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Method (TEVT, 1, NotSerialized)
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{
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Store (ToInteger (Arg0), Local0)
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#ifdef DPTF_TSR0_SENSOR_ID
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If (LEqual (Local0, DPTF_TSR0_SENSOR_ID)) {
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Notify (^TSR0, 0x90)
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}
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#endif
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#ifdef DPTF_TSR1_SENSOR_ID
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If (LEqual (Local0, DPTF_TSR1_SENSOR_ID)) {
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Notify (^TSR1, 0x90)
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}
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#endif
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#ifdef DPTF_TSR2_SENSOR_ID
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If (LEqual (Local0, DPTF_TSR2_SENSOR_ID)) {
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Notify (^TSR2, 0x90)
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}
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#endif
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#ifdef DPTF_TSR3_SENSOR_ID
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If (LEqual (Local0, DPTF_TSR3_SENSOR_ID)) {
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Notify (^TSR3, 0x90)
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}
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#endif
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}
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/* Thermal device initialization - Disable Aux Trip Points */
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Method (TINI)
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{
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#ifdef DPTF_TSR0_SENSOR_ID
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^TSR0.PATD ()
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#endif
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#ifdef DPTF_TSR1_SENSOR_ID
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^TSR1.PATD ()
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#endif
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#ifdef DPTF_TSR2_SENSOR_ID
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^TSR2.PATD ()
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#endif
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#ifdef DPTF_TSR3_SENSOR_ID
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^TSR3.PATD ()
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#endif
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}
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/* Thermal Trip Points Change Event Handler */
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Method (TPET)
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{
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#ifdef DPTF_TSR0_SENSOR_ID
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Notify (^TSR0, 0x81)
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#endif
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#ifdef DPTF_TSR1_SENSOR_ID
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Notify (^TSR1, 0x81)
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#endif
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#ifdef DPTF_TSR2_SENSOR_ID
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Notify (^TSR2, 0x81)
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#endif
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#ifdef DPTF_TSR3_SENSOR_ID
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Notify (^TSR3, 0x81)
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#endif
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}
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/*
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* Method to return trip temperature value depending upon the device mode.
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* Arg0 --> Value to return when device is in tablet mode
|
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* Arg1 --> Value to return when device is not in tablet mode.
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*/
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Method (DTRP, 2, Serialized)
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{
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#ifdef EC_ENABLE_MULTIPLE_DPTF_PROFILES
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If (LEqual (\_SB.PCI0.LPCB.EC0.RCDP, One)) {
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Return (CTOK (Arg0))
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} Else {
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#endif
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Return (CTOK (Arg1))
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#ifdef EC_ENABLE_MULTIPLE_DPTF_PROFILES
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}
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#endif
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}
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#ifdef DPTF_TSR0_SENSOR_ID
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#ifndef DPTF_TSR0_TABLET_PASSIVE
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#define DPTF_TSR0_TABLET_PASSIVE DPTF_TSR0_PASSIVE
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#endif
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#ifndef DPTF_TSR0_TABLET_CRITICAL
|
||||
#define DPTF_TSR0_TABLET_CRITICAL DPTF_TSR0_CRITICAL
|
||||
#endif
|
||||
|
||||
Device (TSR0)
|
||||
{
|
||||
Name (_HID, EISAID ("INT3403"))
|
||||
Name (_UID, 1)
|
||||
Name (PTYP, 0x03)
|
||||
Name (TMPI, DPTF_TSR0_SENSOR_ID)
|
||||
Name (_STR, Unicode (DPTF_TSR0_SENSOR_NAME))
|
||||
Name (GTSH, 20) /* 2 degree hysteresis */
|
||||
|
||||
Method (_STA)
|
||||
{
|
||||
If (LEqual (\DPTE, One)) {
|
||||
Return (0xF)
|
||||
} Else {
|
||||
Return (0x0)
|
||||
}
|
||||
}
|
||||
|
||||
Method (_TMP, 0, Serialized)
|
||||
{
|
||||
Return (\_SB.PCI0.LPCB.EC0.TSRD (TMPI))
|
||||
}
|
||||
|
||||
Method (_PSV)
|
||||
{
|
||||
Return (DTRP (DPTF_TSR0_TABLET_PASSIVE, DPTF_TSR0_PASSIVE))
|
||||
}
|
||||
|
||||
Method (_CRT)
|
||||
{
|
||||
Return (DTRP (DPTF_TSR0_TABLET_CRITICAL, DPTF_TSR0_CRITICAL))
|
||||
}
|
||||
|
||||
Name (PATC, 2)
|
||||
|
||||
/* Set Aux Trip Point */
|
||||
Method (PAT0, 1, Serialized)
|
||||
{
|
||||
\_SB.PCI0.LPCB.EC0.PAT0 (TMPI, Arg0)
|
||||
}
|
||||
|
||||
/* Set Aux Trip Point */
|
||||
Method (PAT1, 1, Serialized)
|
||||
{
|
||||
\_SB.PCI0.LPCB.EC0.PAT1 (TMPI, Arg0)
|
||||
}
|
||||
|
||||
/* Disable Aux Trip Point */
|
||||
Method (PATD, 0, Serialized)
|
||||
{
|
||||
\_SB.PCI0.LPCB.EC0.PATD (TMPI)
|
||||
}
|
||||
|
||||
#ifdef DPTF_ENABLE_FAN_CONTROL
|
||||
#ifdef DPTF_TSR0_ACTIVE_AC0
|
||||
Method (_AC0)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR0_ACTIVE_AC0))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR0_ACTIVE_AC1
|
||||
Method (_AC1)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR0_ACTIVE_AC1))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR0_ACTIVE_AC2
|
||||
Method (_AC2)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR0_ACTIVE_AC2))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR0_ACTIVE_AC3
|
||||
Method (_AC3)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR0_ACTIVE_AC3))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR0_ACTIVE_AC4
|
||||
Method (_AC4)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR0_ACTIVE_AC4))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR0_ACTIVE_AC5
|
||||
Method (_AC5)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR0_ACTIVE_AC5))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR0_ACTIVE_AC6
|
||||
Method (_AC6)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR0_ACTIVE_AC6))
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef DPTF_TSR1_SENSOR_ID
|
||||
|
||||
#ifndef DPTF_TSR1_TABLET_PASSIVE
|
||||
#define DPTF_TSR1_TABLET_PASSIVE DPTF_TSR1_PASSIVE
|
||||
#endif
|
||||
#ifndef DPTF_TSR1_TABLET_CRITICAL
|
||||
#define DPTF_TSR1_TABLET_CRITICAL DPTF_TSR1_CRITICAL
|
||||
#endif
|
||||
|
||||
Device (TSR1)
|
||||
{
|
||||
Name (_HID, EISAID ("INT3403"))
|
||||
Name (_UID, 2)
|
||||
Name (PTYP, 0x03)
|
||||
Name (TMPI, DPTF_TSR1_SENSOR_ID)
|
||||
Name (_STR, Unicode (DPTF_TSR1_SENSOR_NAME))
|
||||
Name (GTSH, 20) /* 2 degree hysteresis */
|
||||
|
||||
Method (_STA)
|
||||
{
|
||||
If (LEqual (\DPTE, One)) {
|
||||
Return (0xF)
|
||||
} Else {
|
||||
Return (0x0)
|
||||
}
|
||||
}
|
||||
|
||||
Method (_TMP, 0, Serialized)
|
||||
{
|
||||
Return (\_SB.PCI0.LPCB.EC0.TSRD (TMPI))
|
||||
}
|
||||
|
||||
Method (_PSV)
|
||||
{
|
||||
Return (DTRP (DPTF_TSR1_TABLET_PASSIVE, DPTF_TSR1_PASSIVE))
|
||||
}
|
||||
|
||||
Method (_CRT)
|
||||
{
|
||||
Return (DTRP (DPTF_TSR1_TABLET_CRITICAL, DPTF_TSR1_CRITICAL))
|
||||
}
|
||||
|
||||
Name (PATC, 2)
|
||||
|
||||
/* Set Aux Trip Point */
|
||||
Method (PAT0, 1, Serialized)
|
||||
{
|
||||
\_SB.PCI0.LPCB.EC0.PAT0 (TMPI, Arg0)
|
||||
}
|
||||
|
||||
/* Set Aux Trip Point */
|
||||
Method (PAT1, 1, Serialized)
|
||||
{
|
||||
\_SB.PCI0.LPCB.EC0.PAT1 (TMPI, Arg0)
|
||||
}
|
||||
|
||||
/* Disable Aux Trip Point */
|
||||
Method (PATD, 0, Serialized)
|
||||
{
|
||||
\_SB.PCI0.LPCB.EC0.PATD (TMPI)
|
||||
}
|
||||
|
||||
#ifdef DPTF_ENABLE_FAN_CONTROL
|
||||
#ifdef DPTF_TSR1_ACTIVE_AC0
|
||||
Method (_AC0)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC0))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR1_ACTIVE_AC1
|
||||
Method (_AC1)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC1))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR1_ACTIVE_AC2
|
||||
Method (_AC2)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC2))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR1_ACTIVE_AC3
|
||||
Method (_AC3)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC3))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR1_ACTIVE_AC4
|
||||
Method (_AC4)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC4))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR1_ACTIVE_AC5
|
||||
Method (_AC5)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC5))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR1_ACTIVE_AC6
|
||||
Method (_AC6)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC6))
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef DPTF_TSR2_SENSOR_ID
|
||||
|
||||
#ifndef DPTF_TSR2_TABLET_PASSIVE
|
||||
#define DPTF_TSR2_TABLET_PASSIVE DPTF_TSR2_PASSIVE
|
||||
#endif
|
||||
#ifndef DPTF_TSR2_TABLET_CRITICAL
|
||||
#define DPTF_TSR2_TABLET_CRITICAL DPTF_TSR2_CRITICAL
|
||||
#endif
|
||||
|
||||
Device (TSR2)
|
||||
{
|
||||
Name (_HID, EISAID ("INT3403"))
|
||||
Name (_UID, 3)
|
||||
Name (PTYP, 0x03)
|
||||
Name (TMPI, DPTF_TSR2_SENSOR_ID)
|
||||
Name (_STR, Unicode (DPTF_TSR2_SENSOR_NAME))
|
||||
Name (GTSH, 20) /* 2 degree hysteresis */
|
||||
|
||||
Method (_STA)
|
||||
{
|
||||
If (LEqual (\DPTE, One)) {
|
||||
Return (0xF)
|
||||
} Else {
|
||||
Return (0x0)
|
||||
}
|
||||
}
|
||||
|
||||
Method (_TMP, 0, Serialized)
|
||||
{
|
||||
Return (\_SB.PCI0.LPCB.EC0.TSRD (TMPI))
|
||||
}
|
||||
|
||||
Method (_PSV)
|
||||
{
|
||||
Return (DTRP (DPTF_TSR2_TABLET_PASSIVE, DPTF_TSR2_PASSIVE))
|
||||
}
|
||||
|
||||
Method (_CRT)
|
||||
{
|
||||
Return (DTRP (DPTF_TSR2_TABLET_CRITICAL, DPTF_TSR2_CRITICAL))
|
||||
}
|
||||
|
||||
Name (PATC, 2)
|
||||
|
||||
/* Set Aux Trip Point */
|
||||
Method (PAT0, 1, Serialized)
|
||||
{
|
||||
\_SB.PCI0.LPCB.EC0.PAT0 (TMPI, Arg0)
|
||||
}
|
||||
|
||||
/* Set Aux Trip Point */
|
||||
Method (PAT1, 1, Serialized)
|
||||
{
|
||||
\_SB.PCI0.LPCB.EC0.PAT1 (TMPI, Arg0)
|
||||
}
|
||||
|
||||
/* Disable Aux Trip Point */
|
||||
Method (PATD, 0, Serialized)
|
||||
{
|
||||
\_SB.PCI0.LPCB.EC0.PATD (TMPI)
|
||||
}
|
||||
|
||||
#ifdef DPTF_ENABLE_FAN_CONTROL
|
||||
#ifdef DPTF_TSR2_ACTIVE_AC0
|
||||
Method (_AC0)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR2_ACTIVE_AC0))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR2_ACTIVE_AC1
|
||||
Method (_AC1)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR2_ACTIVE_AC1))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR2_ACTIVE_AC2
|
||||
Method (_AC2)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR2_ACTIVE_AC2))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR2_ACTIVE_AC3
|
||||
Method (_AC3)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR2_ACTIVE_AC3))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR2_ACTIVE_AC4
|
||||
Method (_AC4)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR2_ACTIVE_AC4))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR2_ACTIVE_AC5
|
||||
Method (_AC5)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR2_ACTIVE_AC5))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR2_ACTIVE_AC6
|
||||
Method (_AC6)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR2_ACTIVE_AC6))
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef DPTF_TSR3_SENSOR_ID
|
||||
|
||||
#ifndef DPTF_TSR3_TABLET_PASSIVE
|
||||
#define DPTF_TSR3_TABLET_PASSIVE DPTF_TSR3_PASSIVE
|
||||
#endif
|
||||
#ifndef DPTF_TSR3_TABLET_CRITICAL
|
||||
#define DPTF_TSR3_TABLET_CRITICAL DPTF_TSR3_CRITICAL
|
||||
#endif
|
||||
|
||||
Device (TSR3)
|
||||
{
|
||||
Name (_HID, EISAID ("INT3403"))
|
||||
Name (_UID, 4)
|
||||
Name (PTYP, 0x03)
|
||||
Name (TMPI, DPTF_TSR3_SENSOR_ID)
|
||||
Name (_STR, Unicode (DPTF_TSR3_SENSOR_NAME))
|
||||
Name (GTSH, 20) /* 2 degree hysteresis */
|
||||
|
||||
Method (_STA)
|
||||
{
|
||||
If (LEqual (\DPTE, One)) {
|
||||
Return (0xF)
|
||||
} Else {
|
||||
Return (0x0)
|
||||
}
|
||||
}
|
||||
|
||||
Method (_TMP, 0, Serialized)
|
||||
{
|
||||
Return (\_SB.PCI0.LPCB.EC0.TSRD (TMPI))
|
||||
}
|
||||
|
||||
Method (_PSV)
|
||||
{
|
||||
Return (DTRP (DPTF_TSR3_TABLET_PASSIVE, DPTF_TSR3_PASSIVE))
|
||||
}
|
||||
|
||||
Method (_CRT)
|
||||
{
|
||||
Return (DTRP (DPTF_TSR3_TABLET_CRITICAL, DPTF_TSR3_CRITICAL))
|
||||
}
|
||||
|
||||
Name (PATC, 2)
|
||||
|
||||
/* Set Aux Trip Point */
|
||||
Method (PAT0, 1, Serialized)
|
||||
{
|
||||
\_SB.PCI0.LPCB.EC0.PAT0 (TMPI, Arg0)
|
||||
}
|
||||
|
||||
/* Set Aux Trip Point */
|
||||
Method (PAT1, 1, Serialized)
|
||||
{
|
||||
\_SB.PCI0.LPCB.EC0.PAT1 (TMPI, Arg0)
|
||||
}
|
||||
|
||||
/* Disable Aux Trip Point */
|
||||
Method (PATD, 0, Serialized)
|
||||
{
|
||||
\_SB.PCI0.LPCB.EC0.PATD (TMPI)
|
||||
}
|
||||
|
||||
#ifdef DPTF_ENABLE_FAN_CONTROL
|
||||
#ifdef DPTF_TSR3_ACTIVE_AC0
|
||||
Method (_AC0)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR3_ACTIVE_AC0))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR3_ACTIVE_AC1
|
||||
Method (_AC1)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR3_ACTIVE_AC1))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR3_ACTIVE_AC2
|
||||
Method (_AC2)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR3_ACTIVE_AC2))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR3_ACTIVE_AC3
|
||||
Method (_AC3)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR3_ACTIVE_AC3))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR3_ACTIVE_AC4
|
||||
Method (_AC4)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR3_ACTIVE_AC4))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR3_ACTIVE_AC5
|
||||
Method (_AC5)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR3_ACTIVE_AC5))
|
||||
}
|
||||
#endif
|
||||
#ifdef DPTF_TSR3_ACTIVE_AC6
|
||||
Method (_AC6)
|
||||
{
|
||||
Return (\_SB.DPTF.CTOK (DPTF_TSR3_ACTIVE_AC6))
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user