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https://github.com/brain-hackers/u-boot-brain
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355be915ed
Update the power-domain-cells to 2 and add the permissions to each node. Mark the following nodes accessed by r5 as shared: - DDR node - main uart 0 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
66 lines
1.4 KiB
Plaintext
66 lines
1.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for AM6 SoC Family Wakeup Domain peripherals
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*
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* Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
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*/
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&cbass_wakeup {
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dmsc: dmsc {
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compatible = "ti,am654-sci";
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ti,host-id = <12>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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mbox-names = "rx", "tx";
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mboxes= <&secure_proxy_main 11>,
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<&secure_proxy_main 13>;
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k3_pds: power-controller {
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compatible = "ti,sci-pm-domain";
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#power-domain-cells = <2>;
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};
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k3_clks: clocks {
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compatible = "ti,k2g-sci-clk";
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#clock-cells = <2>;
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};
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k3_reset: reset-controller {
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compatible = "ti,sci-reset";
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#reset-cells = <2>;
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};
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};
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wkup_pmx0: pinmux@4301c000 {
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compatible = "pinctrl-single";
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reg = <0x4301c000 0x118>;
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#pinctrl-cells = <1>;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0xffffffff>;
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};
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wkup_uart0: serial@42300000 {
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compatible = "ti,am654-uart";
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reg = <0x42300000 0x100>;
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reg-shift = <2>;
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reg-io-width = <4>;
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interrupts = <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <48000000>;
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current-speed = <115200>;
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};
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wkup_i2c0: i2c@42120000 {
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compatible = "ti,am654-i2c", "ti,omap4-i2c";
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reg = <0x42120000 0x100>;
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interrupts = <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clock-names = "fck";
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clocks = <&k3_clks 115 1>;
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power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
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};
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};
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