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![]() The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> |
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.. | ||
atum8548.c | ||
config.mk | ||
ddr.c | ||
law.c | ||
Makefile | ||
tlb.c | ||
u-boot.lds |