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712a341c76
For ARM core clock, there are two input branches, and can select via mux: one from ARM PLL directly, second from CCM A53 clock root. Currently we are using second branch. But IC confirmed the CCM A53 root signoff timing is 1Ghz, so we should switch to input from ARM PLL directly. This patch fixes the CORE SEL slice configuration and switch ARM clock to ARM PLL. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
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| .. | ||
| clock_imx8mm.h | ||
| clock_imx8mq.h | ||
| clock.h | ||
| crm_regs.h | ||
| ddr.h | ||
| gpio.h | ||
| imx8mm_pins.h | ||
| imx8mn_pins.h | ||
| imx8mp_pins.h | ||
| imx8mq_pins.h | ||
| imx-regs.h | ||
| lpddr4_define.h | ||
| power-domain.h | ||
| sys_proto.h | ||