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![]() For E6500 cores, L2 cache has been used as init_ram. L1 cache is a write through cache on E6500.If lines are not locked in both L1 and L2 caches, crashes are observed during secure boot. This patch locks/ unlocks both L1 and L2 cache to prevent the crash. Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
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mpc5xx | ||
mpc5xxx | ||
mpc8xx | ||
mpc8xxx | ||
mpc83xx | ||
mpc85xx | ||
mpc86xx | ||
mpc512x | ||
mpc8260 | ||
ppc4xx | ||
Makefile |