u-boot-brain/arch/powerpc
York Sun 6d2b9da19c powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500
Using E6500 L1 cache as initram requires L2 cache enabled.
Add l2-cache cluster enabling.

Setup stash id for L1 cache as (coreID) * 2 + 32 + 0
Setup stash id for L2 cache as (cluster) * 2 + 32 + 1
Stash id for L2 is only set for Chassis 2.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:15 -05:00
..
cpu powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500 2012-10-22 14:31:15 -05:00
include/asm powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500 2012-10-22 14:31:15 -05:00
lib split mpc8xx hooks from cmd_ide.c 2012-10-17 07:59:08 -07:00
config.mk Handle most LDSCRIPT setting centrally 2011-04-30 00:59:47 +02:00