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6d2b9da19c
Using E6500 L1 cache as initram requires L2 cache enabled. Add l2-cache cluster enabling. Setup stash id for L1 cache as (coreID) * 2 + 32 + 0 Setup stash id for L2 cache as (cluster) * 2 + 32 + 1 Stash id for L2 is only set for Chassis 2. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com> |
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| avr32 | ||
| blackfin | ||
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| microblaze | ||
| mips | ||
| nds32 | ||
| nios2 | ||
| openrisc | ||
| powerpc | ||
| sandbox | ||
| sh | ||
| sparc | ||
| x86 | ||
| .gitignore | ||