mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
c9bb942e2f
Some archs/boards specify their own default by pre-defining the config which causes the Kconfig system to mix up the order of the configs in the defconfigs... This will cause merge pain if allowed to proliferate. Remove the configs that behave this way from the archs. A few configs still remain, but that is because they only exist as defaults and do not have a proper Kconfig entry. Those appear to be: SPIFLASH DISPLAY_BOARDINFO Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> [trini: rastaban, am43xx_evm_usbhost_boot, am43xx_evm_ethboot updates, drop DM_USB from MSI_Primo81 as USB_MUSB_SUNXI isn't converted yet to DM] Signed-off-by: Tom Rini <trini@konsulko.com>
146 lines
3.5 KiB
C
146 lines
3.5 KiB
C
/*
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* U-boot - Configuration file for IP04 board (having BF532 processor)
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*
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* Copyright (c) 2006 Intratrade Ltd., Ivan Danov, idanov@gmail.com
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*
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* Copyright (c) 2005-2010 Analog Devices Inc.
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*
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* (C) Copyright 2000-2004
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef __CONFIG_IP04_H__
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#define __CONFIG_IP04_H__
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#include <asm/config-pre.h>
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/*
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* Processor Settings
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*/
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#define CONFIG_BFIN_CPU bf532-0.5
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#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_NAND
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/*
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* Clock Settings
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* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
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* SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
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*/
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/* CONFIG_CLKIN_HZ is any value in Hz */
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#define CONFIG_CLKIN_HZ 10000000
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/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
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/* 1 = CLKIN / 2 */
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#define CONFIG_CLKIN_HALF 0
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/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
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/* 1 = bypass PLL */
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#define CONFIG_PLL_BYPASS 0
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/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
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/* Values can range from 0-63 (where 0 means 64) */
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#define CONFIG_VCO_MULT 40
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/* CCLK_DIV controls the core clock divider */
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/* Values can be 1, 2, 4, or 8 ONLY */
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#define CONFIG_CCLK_DIV 1
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/* SCLK_DIV controls the system clock divider */
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/* Values can range from 1-15 */
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#define CONFIG_SCLK_DIV 3
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/*
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* Memory Settings
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*/
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#define CONFIG_MEM_ADD_WDTH 10
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#define CONFIG_MEM_SIZE 64
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#define CONFIG_EBIU_SDRRC_VAL 0x408
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#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd
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#define CONFIG_EBIU_AMGCTL_VAL 0xFF
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#define CONFIG_EBIU_AMBCTL0_VAL 0xffc2ffc2
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#define CONFIG_EBIU_AMBCTL1_VAL 0xffc2ffc2
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#define CONFIG_SYS_MONITOR_LEN (384 * 1024)
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#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
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/*
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* Network Settings
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*/
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#define ADI_CMDS_NETWORK 1
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#define CONFIG_HOSTNAME IP04
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#define CONFIG_DRIVER_DM9000 1
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#define CONFIG_DM9000_NO_SROM
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#define CONFIG_DM9000_BASE 0x20100000
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#define DM9000_IO CONFIG_DM9000_BASE
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#define DM9000_DATA (CONFIG_DM9000_BASE + 2)
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/*
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* Flash Settings
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*/
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#define CONFIG_ENV_OVERWRITE 1
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#define CONFIG_SYS_NO_FLASH /* we have only NAND */
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/*
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* SPI Settings
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*/
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#define CONFIG_BFIN_SPI
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#define CONFIG_ENV_SPI_MAX_HZ 30000000
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#define CONFIG_SF_DEFAULT_SPEED 30000000
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#define CONFIG_SPI_FLASH_STMICRO
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#define CONFIG_SPI_FLASH_WINBOND
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/*
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* Env Storage Settings
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*/
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#define CONFIG_PREBOOT "echo starting from spi flash"
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#define CONFIG_ENV_OFFSET 0x30000
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#define CONFIG_ENV_SIZE 0x10000
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#define CONFIG_ENV_SECT_SIZE 0x10000
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/*
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* NAND Settings
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*/
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#define CONFIG_NAND_PLAT
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#define CONFIG_SYS_NAND_BASE 0x20000000
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2))
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#define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 1))
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#define BFIN_NAND_WRITE(addr, cmd) \
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do { \
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bfin_write8(addr, cmd); \
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SSYNC(); \
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} while (0)
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#define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd)
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#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
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#define NAND_PLAT_GPIO_DEV_READY GPIO_PF10
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/*
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* Misc Settings
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*/
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_UART_CONSOLE 0
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#undef CONFIG_SHOW_BOOT_PROGRESS
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/* Enable this if bootretry required; currently it's disabled */
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#define CONFIG_BOOT_RETRY_TIME -1
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#define CONFIG_BOOTCOMMAND "run nandboot"
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/*
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* Pull in common ADI header for remaining command/environment setup
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*/
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#include <configs/bfin_adi_common.h>
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#endif
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