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![Patrice Chotard](/assets/img/avatar_default.png)
Enable USB gadget support using DWC2 driver Populate board_usb_init() to initialize clocks, phy, reset and data needed for DWC2 IP. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
199 lines
4.3 KiB
C
199 lines
4.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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/*
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* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
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*/
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#include <config.h>
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#include <common.h>
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#include <led.h>
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#include <clk.h>
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#include <dm.h>
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#include <generic-phy.h>
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#include <phy.h>
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#include <reset.h>
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#include <usb.h>
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#include <asm/arch/stm32.h>
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#include <asm/io.h>
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#include <power/regulator.h>
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#include <usb/dwc2_udc.h>
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/*
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* Get a global data pointer
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*/
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DECLARE_GLOBAL_DATA_PTR;
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#define STM32MP_GUSBCFG 0x40002407
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#define STM32MP_GGPIO 0x38
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#define STM32MP_GGPIO_VBUS_SENSING BIT(21)
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static struct dwc2_plat_otg_data stm32mp_otg_data = {
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.usb_gusbcfg = STM32MP_GUSBCFG,
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};
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static struct reset_ctl usbotg_reset;
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int board_usb_init(int index, enum usb_init_type init)
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{
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struct fdtdec_phandle_args args;
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struct udevice *dev;
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const void *blob = gd->fdt_blob;
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struct clk clk;
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struct phy phy;
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int node;
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int phy_provider;
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int ret;
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/* find the usb otg node */
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node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2");
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if (node < 0) {
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debug("Not found usb_otg device\n");
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return -ENODEV;
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}
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if (!fdtdec_get_is_enabled(blob, node)) {
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debug("stm32 usbotg is disabled in the device tree\n");
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return -ENODEV;
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}
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/* Enable clock */
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ret = fdtdec_parse_phandle_with_args(blob, node, "clocks",
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"#clock-cells", 0, 0, &args);
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if (ret) {
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debug("usbotg has no clocks defined in the device tree\n");
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return ret;
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}
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ret = uclass_get_device_by_of_offset(UCLASS_CLK, args.node, &dev);
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if (ret)
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return ret;
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if (args.args_count != 1) {
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debug("Can't find clock ID in the device tree\n");
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return -ENODATA;
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}
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clk.dev = dev;
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clk.id = args.args[0];
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ret = clk_enable(&clk);
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if (ret) {
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debug("Failed to enable usbotg clock\n");
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return ret;
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}
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/* Reset */
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ret = fdtdec_parse_phandle_with_args(blob, node, "resets",
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"#reset-cells", 0, 0, &args);
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if (ret) {
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debug("usbotg has no resets defined in the device tree\n");
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goto clk_err;
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}
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ret = uclass_get_device_by_of_offset(UCLASS_RESET, args.node, &dev);
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if (ret || args.args_count != 1)
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goto clk_err;
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usbotg_reset.dev = dev;
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usbotg_reset.id = args.args[0];
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reset_assert(&usbotg_reset);
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udelay(2);
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reset_deassert(&usbotg_reset);
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/* Get USB PHY */
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ret = fdtdec_parse_phandle_with_args(blob, node, "phys",
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"#phy-cells", 0, 0, &args);
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if (!ret) {
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phy_provider = fdt_parent_offset(blob, args.node);
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ret = uclass_get_device_by_of_offset(UCLASS_PHY,
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phy_provider, &dev);
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if (ret)
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goto clk_err;
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phy.dev = dev;
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phy.id = fdtdec_get_uint(blob, args.node, "reg", -1);
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ret = generic_phy_power_on(&phy);
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if (ret) {
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debug("unable to power on the phy\n");
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goto clk_err;
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}
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ret = generic_phy_init(&phy);
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if (ret) {
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debug("failed to init usb phy\n");
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goto phy_power_err;
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}
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}
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/* Parse and store data needed for gadget */
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stm32mp_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
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if (stm32mp_otg_data.regs_otg == FDT_ADDR_T_NONE) {
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debug("usbotg: can't get base address\n");
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ret = -ENODATA;
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goto phy_init_err;
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}
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stm32mp_otg_data.rx_fifo_sz = fdtdec_get_int(blob, node,
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"g-rx-fifo-size", 0);
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stm32mp_otg_data.np_tx_fifo_sz = fdtdec_get_int(blob, node,
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"g-np-tx-fifo-size", 0);
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stm32mp_otg_data.tx_fifo_sz = fdtdec_get_int(blob, node,
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"g-tx-fifo-size", 0);
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/* Enable voltage level detector */
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if (!(fdtdec_parse_phandle_with_args(blob, node, "usb33d-supply",
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NULL, 0, 0, &args))) {
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if (!uclass_get_device_by_of_offset(UCLASS_REGULATOR,
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args.node, &dev)) {
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ret = regulator_set_enable(dev, true);
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if (ret) {
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debug("Failed to enable usb33d\n");
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goto phy_init_err;
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}
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}
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}
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/* Enable vbus sensing */
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setbits_le32(stm32mp_otg_data.regs_otg + STM32MP_GGPIO,
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STM32MP_GGPIO_VBUS_SENSING);
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return dwc2_udc_probe(&stm32mp_otg_data);
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phy_init_err:
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generic_phy_exit(&phy);
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phy_power_err:
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generic_phy_power_off(&phy);
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clk_err:
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clk_disable(&clk);
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return ret;
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}
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int board_usb_cleanup(int index, enum usb_init_type init)
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{
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/* Reset usbotg */
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reset_assert(&usbotg_reset);
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udelay(2);
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reset_deassert(&usbotg_reset);
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return 0;
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}
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int board_late_init(void)
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{
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return 0;
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}
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/* board dependent setup after realloc */
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int board_init(void)
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{
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/* address of boot parameters */
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gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
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if (IS_ENABLED(CONFIG_LED))
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led_default_state();
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return 0;
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}
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