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3bb3f266ee
The J721E DDR subsystem comprises DDR controller, DDR PHY and wrapper logic to integrate these blocks in the device. The DDR subsystem is used to provide an interface to external SDRAM devices which can be utilized for storing program or data. Introduce support for the DDR controller and DDR phy within the DDR subsystem. Signed-off-by: Kevin Scholz <k-scholz@ti.com Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
384 lines
15 KiB
C
384 lines
15 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause */
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/**********************************************************************
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* Copyright (C) 2012-2019 Cadence Design Systems, Inc.
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**********************************************************************
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* WARNING: This file is auto-generated using api-generator utility.
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* api-generator: 12.02.13bb8d5
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* Do not edit it manually.
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**********************************************************************
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* Cadence Core Driver for LPDDR4.
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**********************************************************************
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*/
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#ifndef LPDDR4_OBJ_IF_H
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#define LPDDR4_OBJ_IF_H
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#include "lpddr4_if.h"
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/** @defgroup DriverObject Driver API Object
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* API listing for the driver. The API is contained in the object as
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* function pointers in the object structure. As the actual functions
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* resides in the Driver Object, the client software must first use the
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* global GetInstance function to obtain the Driver Object Pointer.
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* The actual APIs then can be invoked using obj->(api_name)() syntax.
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* These functions are defined in the header file of the core driver
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* and utilized by the API.
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* @{
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*/
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/**********************************************************************
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* API methods
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**********************************************************************/
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typedef struct lpddr4_obj_s
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{
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/**
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* Checks configuration object.
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* @param[in] config Driver/hardware configuration required.
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* @param[out] configSize Size of memory allocations required.
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* @return CDN_EOK on success (requirements structure filled).
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* @return ENOTSUP if configuration cannot be supported due to driver/hardware constraints.
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*/
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uint32_t (*probe)(const lpddr4_config* config, uint16_t* configsize);
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/**
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* Init function to be called after LPDDR4_probe() to set up the
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* driver configuration. Memory should be allocated for drv_data
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* (using the size determined using LPDDR4_probe) before calling
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* this API. init_settings should be initialised with base addresses
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* for PHY Indepenent Module, Controller and PHY before calling this
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* function. If callbacks are required for interrupt handling, these
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* should also be configured in init_settings.
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] cfg Specifies driver/hardware configuration.
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* @return CDN_EOK on success
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* @return EINVAL if illegal/inconsistent values in cfg.
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* @return ENOTSUP if hardware has an inconsistent configuration or doesn't support feature(s) required by 'config' parameters.
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*/
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uint32_t (*init)(lpddr4_privatedata* pd, const lpddr4_config* cfg);
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/**
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* Start the driver.
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* @param[in] pD Driver state info specific to this instance.
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*/
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uint32_t (*start)(const lpddr4_privatedata* pd);
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/**
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* Read a register from the controller, PHY or PHY Independent Module
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] cpp Indicates whether controller, PHY or PHY Independent Module register
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* @param[in] regOffset Register offset
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* @param[out] regValue Register value read
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* @return CDN_EOK on success.
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* @return EINVAL if regOffset if out of range or regValue is NULL
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*/
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uint32_t (*readreg)(const lpddr4_privatedata* pd, lpddr4_regblock cpp, uint32_t regoffset, uint32_t* regvalue);
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/**
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* Write a register in the controller, PHY or PHY Independent Module
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] cpp Indicates whether controller, PHY or PHY Independent Module register
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* @param[in] regOffset Register offset
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* @param[in] regValue Register value to be written
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* @return CDN_EOK on success.
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* @return EINVAL if regOffset is out of range or regValue is NULL
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*/
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uint32_t (*writereg)(const lpddr4_privatedata* pd, lpddr4_regblock cpp, uint32_t regoffset, uint32_t regvalue);
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/**
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* Read a memory mode register from DRAM
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] readModeRegVal Value to set in 'read_modereg' parameter.
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* @param[out] mmrValue Value which is read from memory mode register(mmr) for all devices.
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* @param[out] mmrStatus Status of mode register read(mrr) instruction.
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* @return CDN_EOK on success.
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* @return EINVAL if regNumber is out of range or regValue is NULL
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*/
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uint32_t (*getmmrregister)(const lpddr4_privatedata* pd, uint32_t readmoderegval, uint64_t* mmrvalue, uint8_t* mmrstatus);
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/**
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* Write a memory mode register in DRAM
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] writeModeRegVal Value to set in 'write_modereg' parameter.
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* @param[out] mrwStatus Status of mode register write(mrw) instruction.
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* @return CDN_EOK on success.
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* @return EINVAL if regNumber is out of range or regValue is NULL
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*/
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uint32_t (*setmmrregister)(const lpddr4_privatedata* pd, uint32_t writemoderegval, uint8_t* mrwstatus);
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/**
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* Write a set of initialisation values to the controller registers
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] regValues Register values to be written
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* @return CDN_EOK on success.
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* @return EINVAL if regValues is NULL
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*/
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uint32_t (*writectlconfig)(const lpddr4_privatedata* pd, const lpddr4_reginitdata* regvalues);
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/**
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* Write a set of initialisation values to the PHY registers
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] regValues Register values to be written
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* @return CDN_EOK on success.
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* @return EINVAL if regValues is NULL
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*/
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uint32_t (*writephyconfig)(const lpddr4_privatedata* pd, const lpddr4_reginitdata* regvalues);
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/**
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* Write a set of initialisation values to the PHY Independent Module
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* registers
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] regValues Register values to be written
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* @return CDN_EOK on success.
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* @return EINVAL if regValues is NULL
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*/
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uint32_t (*writephyindepconfig)(const lpddr4_privatedata* pd, const lpddr4_reginitdata* regvalues);
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/**
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* Read values of the controller registers in bulk (Set
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* 'updateCtlReg' to read) and store in memory.
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* @param[in] pD Driver state info specific to this instance.
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* @param[out] regValues Register values which are read
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* @return CDN_EOK on success.
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* @return EINVAL if regValues is NULL
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*/
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uint32_t (*readctlconfig)(const lpddr4_privatedata* pd, lpddr4_reginitdata* regvalues);
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/**
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* Read the values of the PHY module registers in bulk (Set
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* 'updatePhyReg' to read) and store in memory.
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* @param[in] pD Driver state info specific to this instance.
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* @param[out] regValues Register values which are read
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* @return CDN_EOK on success.
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* @return EINVAL if regValues is NULL
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*/
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uint32_t (*readphyconfig)(const lpddr4_privatedata* pd, lpddr4_reginitdata* regvalues);
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/**
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* Read the values of the PHY Independent module registers in
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* bulk(Set 'updatePhyIndepReg' to read) and store in memory.
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* @param[in] pD Driver state info specific to this instance.
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* @param[out] regValues Register values which are read
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* @return CDN_EOK on success.
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* @return EINVAL if regValues is NULL
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*/
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uint32_t (*readphyindepconfig)(const lpddr4_privatedata* pd, lpddr4_reginitdata* regvalues);
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/**
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* Read the current interrupt mask for the controller
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* @param[in] pD Driver state info specific to this instance.
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* @param[out] mask Value of interrupt mask
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* @return CDN_EOK on success.
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* @return EINVAL if mask pointer is NULL
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*/
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uint32_t (*getctlinterruptmask)(const lpddr4_privatedata* pd, uint64_t* mask);
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/**
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* Sets the interrupt mask for the controller
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] mask Value of interrupt mask to be written
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* @return CDN_EOK on success.
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* @return EINVAL if mask pointer is NULL
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*/
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uint32_t (*setctlinterruptmask)(const lpddr4_privatedata* pd, const uint64_t* mask);
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/**
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* Check whether a specific controller interrupt is active
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] intr Interrupt to be checked
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* @param[out] irqStatus Status of the interrupt, TRUE if active
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* @return CDN_EOK on success.
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* @return EINVAL if intr is not valid
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*/
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uint32_t (*checkctlinterrupt)(const lpddr4_privatedata* pd, lpddr4_ctlinterrupt intr, bool* irqstatus);
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/**
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* Acknowledge a specific controller interrupt
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] intr Interrupt to be acknowledged
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* @return CDN_EOK on success.
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* @return EINVAL if intr is not valid
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*/
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uint32_t (*ackctlinterrupt)(const lpddr4_privatedata* pd, lpddr4_ctlinterrupt intr);
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/**
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* Read the current interrupt mask for the PHY Independent Module
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* @param[in] pD Driver state info specific to this instance.
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* @param[out] mask Value of interrupt mask
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* @return CDN_EOK on success.
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* @return EINVAL if mask pointer is NULL
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*/
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uint32_t (*getphyindepinterruptmask)(const lpddr4_privatedata* pd, uint32_t* mask);
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/**
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* Sets the interrupt mask for the PHY Independent Module
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] mask Value of interrupt mask to be written
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* @return CDN_EOK on success.
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* @return EINVAL if mask pointer is NULL
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*/
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uint32_t (*setphyindepinterruptmask)(const lpddr4_privatedata* pd, const uint32_t* mask);
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/**
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* Check whether a specific PHY Independent Module interrupt is
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* active
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] intr Interrupt to be checked
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* @param[out] irqStatus Status of the interrupt, TRUE if active
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* @return CDN_EOK on success.
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* @return EINVAL if intr is not valid
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*/
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uint32_t (*checkphyindepinterrupt)(const lpddr4_privatedata* pd, lpddr4_phyindepinterrupt intr, bool* irqstatus);
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/**
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* Acknowledge a specific PHY Independent Module interrupt
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] intr Interrupt to be acknowledged
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* @return CDN_EOK on success.
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* @return EINVAL if intr is not valid
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*/
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uint32_t (*ackphyindepinterrupt)(const lpddr4_privatedata* pd, lpddr4_phyindepinterrupt intr);
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/**
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* Retrieve status information after a failed init. The
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* DebugStructInfo will be filled in with error codes which can be
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* referenced against the driver documentation for further details.
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* @param[in] pD Driver state info specific to this instance.
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* @param[out] debugInfo status
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* @return CDN_EOK on success.
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* @return EINVAL if debugInfo is NULL
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*/
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uint32_t (*getdebuginitinfo)(const lpddr4_privatedata* pd, lpddr4_debuginfo* debuginfo);
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/**
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* Get the current value of Low power Interface wake up time.
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] lpiWakeUpParam LPI timing parameter
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* @param[in] fspNum Frequency copy
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* @param[out] cycles Timing value(in cycles)
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* @return CDN_EOK on success.
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* @return EINVAL if powerMode is NULL
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*/
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uint32_t (*getlpiwakeuptime)(const lpddr4_privatedata* pd, const lpddr4_lpiwakeupparam* lpiwakeupparam, const lpddr4_ctlfspnum* fspnum, uint32_t* cycles);
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/**
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* Set the current value of Low power Interface wake up time.
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] lpiWakeUpParam LPI timing parameter
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* @param[in] fspNum Frequency copy
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* @param[in] cycles Timing value(in cycles)
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* @return CDN_EOK on success.
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* @return EINVAL if powerMode is NULL
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*/
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uint32_t (*setlpiwakeuptime)(const lpddr4_privatedata* pd, const lpddr4_lpiwakeupparam* lpiwakeupparam, const lpddr4_ctlfspnum* fspnum, const uint32_t* cycles);
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/**
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* Get the current value for ECC auto correction
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* @param[in] pD Driver state info specific to this instance.
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* @param[out] eccParam ECC parameter setting
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* @return CDN_EOK on success.
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* @return EINVAL if on_off is NULL
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*/
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uint32_t (*geteccenable)(const lpddr4_privatedata* pd, lpddr4_eccenable* eccparam);
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/**
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* Set the value for ECC auto correction. This API must be called
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* before startup of memory.
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] eccParam ECC control parameter setting
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* @return CDN_EOK on success.
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* @return EINVAL if on_off is NULL
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*/
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uint32_t (*seteccenable)(const lpddr4_privatedata* pd, const lpddr4_eccenable* eccparam);
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/**
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* Get the current value for the Half Datapath option
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* @param[in] pD Driver state info specific to this instance.
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* @param[out] mode Half Datapath setting
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* @return CDN_EOK on success.
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* @return EINVAL if mode is NULL
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*/
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uint32_t (*getreducmode)(const lpddr4_privatedata* pd, lpddr4_reducmode* mode);
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/**
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* Set the value for the Half Datapath option. This API must be
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* called before startup of memory.
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] mode Half Datapath setting
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* @return CDN_EOK on success.
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* @return EINVAL if mode is NULL
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*/
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uint32_t (*setreducmode)(const lpddr4_privatedata* pd, const lpddr4_reducmode* mode);
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/**
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* Get the current value for Data Bus Inversion setting. This will
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* be compared with the current DRAM setting using the MR3
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* register.
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* @param[in] pD Driver state info specific to this instance.
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* @param[out] on_off DBI read value
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* @return CDN_EOK on success.
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* @return EINVAL if on_off is NULL
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*/
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uint32_t (*getdbireadmode)(const lpddr4_privatedata* pd, bool* on_off);
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/**
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* Get the current value for Data Bus Inversion setting. This will
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* be compared with the current DRAM setting using the MR3
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* register.
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* @param[in] pD Driver state info specific to this instance.
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* @param[out] on_off DBI write value
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* @return CDN_EOK on success.
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* @return EINVAL if on_off is NULL
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*/
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uint32_t (*getdbiwritemode)(const lpddr4_privatedata* pd, bool* on_off);
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/**
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* Set the mode for Data Bus Inversion. This will also be set in DRAM
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* using the MR3 controller register. This API must be called
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* before startup of memory.
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] mode status
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* @return CDN_EOK on success.
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* @return EINVAL if mode is NULL
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*/
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uint32_t (*setdbimode)(const lpddr4_privatedata* pd, const lpddr4_dbimode* mode);
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/**
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* Get the current value for the refresh rate (reading Refresh per
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* command timing).
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] fspNum Frequency set number
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* @param[out] cycles Refresh rate (in cycles)
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* @return CDN_EOK on success.
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* @return EINVAL if rate is NULL
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*/
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uint32_t (*getrefreshrate)(const lpddr4_privatedata* pd, const lpddr4_ctlfspnum* fspnum, uint32_t* cycles);
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/**
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* Set the refresh rate (writing Refresh per command timing).
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] fspNum Frequency set number
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* @param[in] cycles Refresh rate (in cycles)
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* @return CDN_EOK on success.
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* @return EINVAL if rate is NULL
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*/
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uint32_t (*setrefreshrate)(const lpddr4_privatedata* pd, const lpddr4_ctlfspnum* fspnum, const uint32_t* cycles);
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/**
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* Handle Refreshing per chip select
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* @param[in] pD Driver state info specific to this instance.
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* @param[in] trefInterval status
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* @return CDN_EOK on success.
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* @return EINVAL if chipSelect is invalid
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*/
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uint32_t (*refreshperchipselect)(const lpddr4_privatedata* pd, const uint32_t trefinterval);
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} LPDDR4_OBJ;
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/**
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* In order to access the LPDDR4 APIs, the upper layer software must call
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* this global function to obtain the pointer to the driver object.
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* @return LPDDR4_OBJ* Driver Object Pointer
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*/
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extern LPDDR4_OBJ *lpddr4_getinstance(void);
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#endif /* LPDDR4_OBJ_IF_H */
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