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This adds platform code and the device tree for the Phytium Durian Board. The initial support comprises the UART and the PCIE. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Tom Rini <trini@konsulko.com> Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Steven Hao <liuhao@phytium.com.cn>
34 lines
741 B
Plaintext
34 lines
741 B
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019, Phytium Ltd.
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* shuyiqi <shuyiqi@phytium.com.cn>
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*/
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/dts-v1/;
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/ {
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model = "Phytium Durian";
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compatible = "phytium,durian";
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#address-cells = <2>;
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#size-cells = <2>;
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pcie-controller@40000000 {
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compatible = "phytium,pcie-host-1.0";
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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reg = <0x0 0x40000000 0x0 0x10000000>;
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bus-range = <0x0 0xff>;
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ranges = <0x1000000 0x0 0x0 0x0 0x50000000 0x0 0xF00000>,
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<0x2000000 0x0 0x58000000 0x0 0x58000000 0x0 0x28000000>,
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<0x43000000 0x10 0x00000000 0x10 0x00000000 0x10 0x00000000>;
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};
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uart@28001000 {
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compatible = "arm,pl011";
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reg = <0x0 0x28001000 0x0 0x1000>;
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clock = <48000000>;
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};
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};
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