Paul Burton 5c72e5a62e MIPS: Define register names for cache init ... Define names for registers holding cache sizes throughout mips_cache_reset, in order to make the code easier to read & allow for changing register assignments more easily. Signed-off-by: Paul Burton <paul.burton@imgtec.com>		2016-09-21 15:04:04 +02:00
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cpu	MIPS: If we don't need DDR for cache init, init cache first	2016-09-21 15:04:04 +02:00
dts	mips: xilfpga: Add device tree files	2016-09-21 14:55:14 +02:00
include/asm	MIPS: Preserve Config implementation-defined bits	2016-09-21 15:04:04 +02:00
lib	MIPS: Define register names for cache init	2016-09-21 15:04:04 +02:00
mach-ath79	MIPS: ath79: Use mach_cpu_init instead of arch_cpu_init	2016-09-21 15:04:04 +02:00
mach-au1x00	net: mii: Use spatch to update miiphy_register	2016-08-15 15:26:33 -05:00
mach-pic32	clk: convert API to match reset/mailbox style	2016-06-19 17:05:55 -06:00
config.mk	MIPS: provide a default u-boot-spl.lds	2016-05-31 09:38:11 +02:00
Kconfig	mips: Add MIPSfpga platform support	2016-09-21 14:55:14 +02:00
Makefile	MIPS: add tune for MIPS 34kc	2016-05-31 09:38:11 +02:00