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MIPS: Preserve Config implementation-defined bits

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The coprocessor 0 Config register includes 9 implementation defined
bits, which in some processors do things like enable write combining or
other functionality. We ought not to wipe them to 0 during boot. Rather
than doing so, preserve their value & only clear the bits standardised
by the MIPS architecture.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
This commit is contained in:
Paul Burton 2016-09-21 11:18:50 +01:00 committed by Daniel Schwierzeck
parent 33b5c9b209
commit 4f9226b403
2 changed files with 4 additions and 2 deletions
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5
arch/mips/cpu/start.S
View File

@ -123,8 +123,9 @@ reset:
mtc0 zero, CP0_COMPARE
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
/* CONFIG0 register */
li t0, CONF_CM_UNCACHED
mfc0 t0, CP0_CONFIG
and t0, t0, MIPS_CONF_IMPL
or t0, t0, CONF_CM_UNCACHED
mtc0 t0, CP0_CONFIG
#endif

1
arch/mips/include/asm/mipsregs.h
View File

@ -450,6 +450,7 @@
#define MIPS_CONF_MT_FTLB (_ULCAST_(4) << 7)
#define MIPS_CONF_AR (_ULCAST_(7) << 10)
#define MIPS_CONF_AT (_ULCAST_(3) << 13)
#define MIPS_CONF_IMPL (_ULCAST_(0x1ff) << 16)
#define MIPS_CONF_M (_ULCAST_(1) << 31)
/*