mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 02:36:39 +09:00
5990b05951
add DM support for parallel I/O ports on QUICC Engine Block Signed-off-by: Heiko Schocher <hs@denx.de> Patch-cc: Mario Six <mario.six@gdsys.cc> Patch-cc: Qiang Zhao <qiang.zhao@nxp.com> Patch-cc: Holger Brunck <holger.brunck@hitachi-powergrids.com> Series-changes: 2 - remove RFC - fixed Codingstyle errors, therefore new patch powerpc, mpc83xx: fix codingstyle issues for qe_io.c - moved DM part to drivers/pinctrl Commit-notes: Open questions / discussion: - I let the old none DM based implementation in code so boards should work with old implementation. This should be removed if all boards are converted to DM/DTS. - Unfortunately linux DTS does not use "pinctrl-" properties, instead "pio-handle" properties. Even worser old U-Boot code initializes all pins defined in "const qe_iop_conf_t qe_iop_conf_tab[]" table in board code. As linux does the same I decided to also scan through all subnodes containing "pio-map" property and initialize them too. The proper solution would be to check for "pio-handle" when a device is probed. END
31 lines
1.1 KiB
Makefile
31 lines
1.1 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0+
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obj-y += pinctrl-uclass.o
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obj-$(CONFIG_$(SPL_)PINCTRL_GENERIC) += pinctrl-generic.o
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obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o
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obj-$(CONFIG_PINCTRL_AT91PIO4) += pinctrl-at91-pio4.o
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obj-y += nxp/
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obj-$(CONFIG_$(SPL_)PINCTRL_ROCKCHIP) += rockchip/
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obj-$(CONFIG_ARCH_ASPEED) += aspeed/
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obj-$(CONFIG_ARCH_ATH79) += ath79/
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obj-$(CONFIG_PINCTRL_INTEL) += intel/
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obj-$(CONFIG_ARCH_MTMIPS) += mtmips/
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obj-$(CONFIG_ARCH_RMOBILE) += renesas/
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obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o
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obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/
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obj-$(CONFIG_PINCTRL_PIC32) += pinctrl_pic32.o
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obj-$(CONFIG_PINCTRL_EXYNOS) += exynos/
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obj-$(CONFIG_PINCTRL_MESON) += meson/
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obj-$(CONFIG_PINCTRL_MTK) += mediatek/
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obj-$(CONFIG_PINCTRL_MSCC) += mscc/
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obj-$(CONFIG_ARCH_MVEBU) += mvebu/
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obj-$(CONFIG_ARCH_NEXELL) += nexell/
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obj-$(CONFIG_PINCTRL_QE) += pinctrl-qe-io.o
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obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
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obj-$(CONFIG_PINCTRL_STI) += pinctrl-sti.o
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obj-$(CONFIG_PINCTRL_STM32) += pinctrl_stm32.o
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obj-$(CONFIG_$(SPL_)PINCTRL_STMFX) += pinctrl-stmfx.o
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obj-y += broadcom/
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