Marek Vasut 34584d190d arm: socfpga: Zap spl.h and ad-hoc related syms ... Switch to the common spl.h file and zap the arch/spl.h . Since the arch/spl.h contained various ad-hoc symbols, zap those symbols as well and rework the board configuration a little so it doesn't depend on them. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Acked-by: Pavel Machek <pavel@denx.de>		2014-10-27 02:26:24 +01:00
..
clock_manager.c	arm: socfpga: clock: Sync with reference code	2014-10-06 17:46:49 +02:00
config.mk	socfpga: Fix SOCFPGA build error for Altera dev kit	2014-08-29 15:50:54 -04:00
fpga_manager.c	arm: socfpga: fpga: Add SoCFPGA FPGA programming interface	2014-10-06 17:46:50 +02:00
freeze_controller.c	socfpga: Adding Freeze Controller driver	2013-12-03 14:38:56 +01:00
lowlevel_init.S	arm: move exception handling out of start.S files	2014-05-15 16:24:53 +02:00
Makefile	arm: socfpga: fpga: Add SoCFPGA FPGA programming interface	2014-10-06 17:46:50 +02:00
misc.c	arm: socfpga: Move code from misc_init_r() to arch_early_init_r()	2014-10-27 02:26:24 +01:00
reset_manager.c	arm: socfpga: reset: Add function to reset FPGA bridges	2014-10-06 17:46:50 +02:00
scan_manager.c	socfpga: Adding Scan Manager driver	2014-07-05 00:27:27 +02:00
spl.c	arm: socfpga: clock: Clean up bit definitions	2014-10-06 17:46:49 +02:00
system_manager.c	arm: socfpga: sysmgr: Add FPGA bits into system manager	2014-10-06 17:46:50 +02:00
timer.c	arm: socfpga: timer: Pull the timer reload value from config file	2014-10-06 17:46:49 +02:00
u-boot-spl.lds	arm: socfpga: Zap spl.h and ad-hoc related syms	2014-10-27 02:26:24 +01:00