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https://github.com/brain-hackers/u-boot-brain
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![Padmarao Begari](/assets/img/avatar_default.png)
This patch adds Microchip MPFS Icicle board support. For now, NS16550 serial driver is only enabled. The Microchip MPFS Icicle defconfig by default builds U-Boot for M-Mode with SMP support. Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
64 lines
1.3 KiB
C
64 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2019 Microchip Technology Inc.
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* Padmarao Begari <padmarao.begari@microchip.com>
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* CPU and Board Configuration Options
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*/
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#define CONFIG_BOOTP_SEND_HOSTNAME
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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/*
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* Print Buffer Size
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*/
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#define CONFIG_SYS_PBSIZE \
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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/*
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* max number of command args
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*/
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#define CONFIG_SYS_MAXARGS 16
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/*
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* Boot Argument Buffer Size
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*/
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/*
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* Size of malloc() pool
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* 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough
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*/
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#define CONFIG_SYS_MALLOC_LEN (512 << 10)
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/*
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* Physical Memory Map
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*/
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#define PHYS_SDRAM_0 0x80000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_0_SIZE 0x40000000 /* 1 GB */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0
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/* Init Stack Pointer */
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x200000)
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#define CONFIG_SYS_LOAD_ADDR 0x80000000 /* SDRAM */
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/*
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* memtest works on DRAM
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*/
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_0
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#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE)
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/* When we use RAM as ENV */
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#define CONFIG_ENV_SIZE 0x2000
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#endif /* __CONFIG_H */
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