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![Ramon Fried](/assets/img/avatar_default.png)
Introduce new UCLASS_PCI_EP class for handling PCI endpoint devices, allowing to set various attributes of the PCI endpoint device, such as: * configuration space header * BAR definitions * outband memory mapping * start/stop PCI link Signed-off-by: Ramon Fried <ramon.fried@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
212 lines
4.3 KiB
C
212 lines
4.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* PCI Endpoint uclass
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*
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* Based on Linux PCI-EP driver written by
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* Kishon Vijay Abraham I <kishon@ti.com>
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*
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* Copyright (c) 2019
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* Written by Ramon Fried <ramon.fried@gmail.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <linux/log2.h>
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#include <pci_ep.h>
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DECLARE_GLOBAL_DATA_PTR;
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int pci_ep_write_header(struct udevice *dev, uint fn, struct pci_ep_header *hdr)
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{
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struct pci_ep_ops *ops = pci_ep_get_ops(dev);
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if (!ops->write_header)
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return -ENOSYS;
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return ops->write_header(dev, fn, hdr);
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}
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int pci_ep_read_header(struct udevice *dev, uint fn, struct pci_ep_header *hdr)
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{
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struct pci_ep_ops *ops = pci_ep_get_ops(dev);
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if (!ops->read_header)
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return -ENOSYS;
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return ops->read_header(dev, fn, hdr);
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}
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int pci_ep_set_bar(struct udevice *dev, uint func_no, struct pci_bar *ep_bar)
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{
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struct pci_ep_ops *ops = pci_ep_get_ops(dev);
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int flags = ep_bar->flags;
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/* Some basic bar validity checks */
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if (ep_bar->barno > BAR_5 || ep_bar < BAR_0)
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return -EINVAL;
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if ((ep_bar->barno == BAR_5 &&
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(flags & PCI_BASE_ADDRESS_MEM_TYPE_64)) ||
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((flags & PCI_BASE_ADDRESS_SPACE_IO) &&
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(flags & PCI_BASE_ADDRESS_IO_MASK)) ||
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(upper_32_bits(ep_bar->size) &&
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!(flags & PCI_BASE_ADDRESS_MEM_TYPE_64)))
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return -EINVAL;
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if (!ops->set_bar)
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return -ENOSYS;
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return ops->set_bar(dev, func_no, ep_bar);
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}
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int pci_ep_read_bar(struct udevice *dev, uint func_no, struct pci_bar *ep_bar,
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enum pci_barno barno)
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{
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struct pci_ep_ops *ops = pci_ep_get_ops(dev);
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/* Some basic bar validity checks */
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if (barno > BAR_5 || barno < BAR_0)
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return -EINVAL;
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if (!ops->read_bar)
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return -ENOSYS;
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return ops->read_bar(dev, func_no, ep_bar, barno);
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}
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int pci_ep_clear_bar(struct udevice *dev, uint func_num, enum pci_barno bar)
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{
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struct pci_ep_ops *ops = pci_ep_get_ops(dev);
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if (!ops->clear_bar)
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return -ENOSYS;
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return ops->clear_bar(dev, func_num, bar);
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}
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int pci_ep_map_addr(struct udevice *dev, uint func_no, phys_addr_t addr,
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u64 pci_addr, size_t size)
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{
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struct pci_ep_ops *ops = pci_ep_get_ops(dev);
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if (!ops->map_addr)
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return -ENOSYS;
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return ops->map_addr(dev, func_no, addr, pci_addr, size);
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}
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int pci_ep_unmap_addr(struct udevice *dev, uint func_no, phys_addr_t addr)
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{
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struct pci_ep_ops *ops = pci_ep_get_ops(dev);
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if (!ops->unmap_addr)
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return -ENOSYS;
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return ops->unmap_addr(dev, func_no, addr);
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}
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int pci_ep_set_msi(struct udevice *dev, uint func_no, uint interrupts)
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{
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struct pci_ep_ops *ops = pci_ep_get_ops(dev);
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uint encode_int;
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if (interrupts > 32)
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return -EINVAL;
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if (!ops->set_msi)
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return -ENOSYS;
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/* MSI spec permits allocation of
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* only 1, 2, 4, 8, 16, 32 interrupts
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*/
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encode_int = order_base_2(interrupts);
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return ops->set_msi(dev, func_no, encode_int);
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}
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int pci_ep_get_msi(struct udevice *dev, uint func_no)
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{
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struct pci_ep_ops *ops = pci_ep_get_ops(dev);
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int interrupt;
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if (!ops->get_msi)
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return -ENOSYS;
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interrupt = ops->get_msi(dev, func_no);
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if (interrupt < 0)
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return 0;
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/* Translate back from order base 2*/
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interrupt = 1 << interrupt;
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return interrupt;
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}
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int pci_ep_set_msix(struct udevice *dev, uint func_no, uint interrupts)
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{
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struct pci_ep_ops *ops = pci_ep_get_ops(dev);
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if (interrupts < 1 || interrupts > 2048)
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return -EINVAL;
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if (!ops->set_msix)
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return -ENOSYS;
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return ops->set_msix(dev, func_no, interrupts - 1);
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}
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int pci_ep_get_msix(struct udevice *dev, uint func_no)
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{
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struct pci_ep_ops *ops = pci_ep_get_ops(dev);
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int interrupt;
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if (!ops->get_msix)
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return -ENOSYS;
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interrupt = ops->get_msix(dev, func_no);
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if (interrupt < 0)
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return 0;
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return interrupt + 1;
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}
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int pci_ep_raise_irq(struct udevice *dev, uint func_no,
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enum pci_ep_irq_type type, uint interrupt_num)
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{
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struct pci_ep_ops *ops = pci_ep_get_ops(dev);
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if (!ops->raise_irq)
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return -ENOSYS;
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return ops->raise_irq(dev, func_no, type, interrupt_num);
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}
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int pci_ep_start(struct udevice *dev)
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{
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struct pci_ep_ops *ops = pci_ep_get_ops(dev);
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if (!ops->start)
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return -ENOSYS;
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return ops->start(dev);
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}
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int pci_ep_stop(struct udevice *dev)
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{
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struct pci_ep_ops *ops = pci_ep_get_ops(dev);
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if (!ops->stop)
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return -ENOSYS;
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return ops->stop(dev);
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}
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UCLASS_DRIVER(pci_ep) = {
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.id = UCLASS_PCI_EP,
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.name = "pci_ep",
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.flags = DM_UC_FLAG_SEQ_ALIAS,
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};
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