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https://github.com/brain-hackers/u-boot-brain
synced 2024-08-22 09:58:52 +09:00
![Patrick Delaunay](/assets/img/avatar_default.png)
Add minimal devicetree for STM32MP157C-ED1 board, with only the devices to allow boot from SDCARD: - RCC for clock and reset - UART4 for console - I2C and PMIC - DDR - SDMMC0 for SDCard Waiting Kernel upstream for alignment. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
168 lines
2.9 KiB
Plaintext
168 lines
2.9 KiB
Plaintext
/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
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/*
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* Copyright (C) STMicroelectronics 2017 - All Rights Reserved
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* Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
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*/
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/dts-v1/;
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#include "stm32mp157.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/pinctrl/stm32-pinfunc.h>
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/ {
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model = "STMicroelectronics STM32MP157C pmic eval daughter";
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compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
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chosen {
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bootargs = "earlyprintk console=ttyS3,115200 root=/dev/ram";
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stdout-path = "serial3:115200n8";
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};
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memory {
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reg = <0xC0000000 0x40000000>;
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};
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};
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&gpioa {
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status = "okay";
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};
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&gpiob {
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status = "okay";
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};
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&gpioc {
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status = "okay";
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};
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&gpiod {
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status = "okay";
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};
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&gpioe {
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status = "okay";
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};
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&gpiof {
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status = "okay";
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};
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&gpiog {
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status = "okay";
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};
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&gpioh {
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status = "okay";
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};
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&gpioi {
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status = "okay";
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};
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&gpioj {
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status = "okay";
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};
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&gpiok {
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status = "okay";
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};
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&gpioz {
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status = "okay";
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};
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&pinctrl {
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uart4_pins_a: uart4@0 {
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pins1 {
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pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
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bias-disable;
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drive-push-pull;
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slew-rate = <0>;
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};
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pins2 {
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pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
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bias-disable;
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};
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};
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sdmmc1_b4_pins_a: sdmmc1-b4@0 {
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pins {
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pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
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<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
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<STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
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<STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
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<STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */
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<STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
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slew-rate = <3>;
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drive-push-pull;
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bias-disable;
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};
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};
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sdmmc1_dir_pins_a: sdmmc1-dir@0 {
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pins {
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pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
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<STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
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<STM32_PINMUX('B', 9, AF11)>, /* SDMMC1_CDIR */
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<STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
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slew-rate = <3>;
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drive-push-pull;
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bias-pull-up;
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};
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};
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};
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&pinctrl_z {
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i2c4_pins_a: i2c4@0 {
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pins {
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pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
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<STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
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bias-disable;
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drive-open-drain;
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slew-rate = <0>;
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};
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};
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};
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&i2c4 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4_pins_a>;
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i2c-scl-rising-time-ns = <185>;
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i2c-scl-falling-time-ns = <20>;
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status = "okay";
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pmic: stpmu1@33 {
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compatible = "st,stpmu1";
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reg = <0x33>;
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interrupts = <0 2>;
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interrupt-parent = <&gpioa>;
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interrupt-controller;
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#interrupt-cells = <2>;
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status = "okay";
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};
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};
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&sdmmc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
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broken-cd;
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st,dirpol;
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st,negedge;
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st,pin-ckin;
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bus-width = <4>;
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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sd-uhs-sdr50;
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sd-uhs-ddr50;
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sd-uhs-sdr104;
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status = "okay";
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};
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart4_pins_a>;
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status = "okay";
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};
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