brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-10-06 03:20:41 +09:00
Code Issues Projects Releases Wiki Activity
5213f280fc
u-boot-brain/arch/x86/cpu
History
Simon Glass 5213f280fc x86: ivybridge: Convert enable_usb_bar() to use DM PCI API 
Convert this function over to use the driver model PCI API. In this case
we want to avoid using the real PCI devices since they have not yet been
probed. Instead, write directly to their PCI configuration address.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-24 12:09:41 +08:00
..
baytrail dm: x86: Set up interrupt routing from interrupt_init() 2016-01-24 12:07:18 +08:00
coreboot dm: x86: spi: Convert ICH SPI driver to driver model PCI API 2016-01-24 12:07:17 +08:00
efi x86: Convert to use driver model timer 2015-12-01 06:26:35 -07:00
ivybridge x86: ivybridge: Convert enable_usb_bar() to use DM PCI API 2016-01-24 12:09:41 +08:00
qemu dm: x86: Set up interrupt routing from interrupt_init() 2016-01-24 12:07:18 +08:00
quark dm: x86: quark: Add an interrupt driver 2016-01-24 12:07:18 +08:00
queensbay dm: x86: queensbay: Add an interrupt driver 2016-01-24 12:07:18 +08:00
call32.S x86: Add a way to call 32-bit code from 64-bit mode 2015-08-05 08:44:07 -06:00
call64.S x86: Tidy up the 64-bit calling code 2015-08-05 08:42:41 -06:00
config.mk x86: Add Kconfig options to be used by arch/x86/cpu/config.mk 2015-07-14 18:03:15 -06:00
cpu_x86.c x86: Move MP initialization codes into a common place 2015-07-14 18:03:16 -06:00
cpu.c x86: Bring up northbridge, pch and lpc after the CPUs 2016-01-24 12:08:17 +08:00
interrupts.c dm: x86: Set up interrupt routing from interrupt_init() 2016-01-24 12:07:18 +08:00
ioapic.c x86: Add I/O APIC register access routines 2015-07-14 18:03:17 -06:00
irq.c dm: x86: Drop the weak cpu_irq_init() function 2016-01-24 12:07:18 +08:00
lapic.c x86: Remove inline for lapic access routines 2015-07-14 18:03:17 -06:00
Makefile x86: ivybridge: Remove NORTHBRIDGE_INTEL_SANDYBRIDGE 2015-12-09 17:44:50 +08:00
mp_init.c x86: qemu: fix cpu device in smp boot 2016-01-13 12:20:16 +08:00
mtrr.c x86: Test mtrr support flag before accessing mtrr msr 2015-01-23 17:24:55 -07:00
pci.c x86: Remove legacy pci codes 2015-11-13 06:46:25 -08:00
resetvec.S Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
sipi_vector.S x86: Pass correct cpu_index to ap_init() 2015-10-21 07:46:27 -06:00
start16.S x86: fsp: Load GDT before calling FspInitEntry 2015-07-14 18:03:15 -06:00
start.S Fix board init code to respect the C runtime environment 2016-01-13 21:05:17 -05:00
turbo.c x86: Add Intel speedstep and turbo mode code 2014-11-25 06:34:02 -07:00
u-boot.lds x86: Factor out common values in the link script 2014-11-25 06:33:59 -07:00