mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-11 23:33:26 +09:00
![Stephen Warren](/assets/img/avatar_default.png)
Clean up the naming of pinmux-related objects: * Refer to drive groups rather than pad groups to match the Linux kernel. * Ensure all pinmux API types are prefixed with pmux_, values (defines) are prefixed with PMUX_, and functions prefixed with pinmux_. * Modify a few type names to make their content clearer. * Minimal changes to SoC-specific .h/.c files are made so the code still compiles. A separate per-SoC change will be made immediately following, in order to keep individual patch size down. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
35 lines
856 B
C
35 lines
856 B
C
/*
|
|
* (C) Copyright 2013-2014
|
|
* NVIDIA Corporation <www.nvidia.com>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <asm-generic/gpio.h>
|
|
#include <asm/arch/gpio.h>
|
|
#include <asm/arch/gp_padctrl.h>
|
|
#include <asm/arch/pinmux.h>
|
|
#include "pinmux-config-venice2.h"
|
|
#include <i2c.h>
|
|
|
|
/*
|
|
* Routine: pinmux_init
|
|
* Description: Do individual peripheral pinmux configs
|
|
*/
|
|
void pinmux_init(void)
|
|
{
|
|
pinmux_config_pingrp_table(tegra124_pinmux_set_nontristate,
|
|
ARRAY_SIZE(tegra124_pinmux_set_nontristate));
|
|
|
|
pinmux_config_pingrp_table(tegra124_pinmux_common,
|
|
ARRAY_SIZE(tegra124_pinmux_common));
|
|
|
|
pinmux_config_pingrp_table(unused_pins_lowpower,
|
|
ARRAY_SIZE(unused_pins_lowpower));
|
|
|
|
/* Initialize any non-default pad configs (APB_MISC_GP regs) */
|
|
pinmux_config_drvgrp_table(venice2_padctrl,
|
|
ARRAY_SIZE(venice2_padctrl));
|
|
}
|